Inventor

KU JAE HUN

SG29 patents

⚠️ This page may combine multiple inventors who share the name “KU JAE HUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KU JAE HUN

AMKOR TECHNOLOGY INC

Semiconductor package

Semiconductor package including stacked chips with aligned input/output pads

End grid array semiconductor package

Thin and heat radiant semiconductor package and method for manufacturing

Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant

Semiconductor package

Leadframe having lead locks to secure leads to encapsulant

Leadframe and semiconductor package made using the leadframe

Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant

Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant

Apparatus for manufacturing semiconductor packages

Leadframe and semiconductor package made using the leadframe

ST ASSEMBLY TEST SERVICES LTD

Large die package structures and fabrication method therefor

Large die package structures and fabrication method therefor

Large die package structures and fabrication method therefor

Dual row leadframe and fabrication method

Dual row leadframe and fabrication method

Integrated circuit package with leadframe locked encapsulation and method of manufacture therefor

Integrated circuit package with leadframe locked encapsulation and method of manufacture therefor

STATS CHIPPAC LTD

Semiconductor device and method of making TSV interconnect structures using encapsulant for structural support

Semiconductor device and method of forming insulating layer in notches around conductive TSV for stress relief

Semiconductor device and method of forming UBM structure on back surface of TSV semiconductor wafer

SUTHIWONGSUNTHORN NATHAPONG

Semiconductor device having an interconnect structure with TSV using encapsulant for structural support

Semiconductor device and method of forming an interconnect structure with TSV using encapsulant for structural support

CHOI WON KYOUNG

Semiconductor device and method of forming insulating layer in notches around conductive TSV for stress relief

Semiconductor device and method of forming UBM structure on back surface of TSV semiconductor wafer

KOO JUN MO

Semiconductor device and method of forming TSV interposer with semiconductor die and build-up interconnect structure on opposing surfaces of the interposer

AHN BYUNG HOON

Leadframe and semiconductor package made using the leadframe

KOO JUNMO

Integrated circuit packaging system with transparent encapsulation and method of manufacture thereof