Inventor

CHANDHOK MANISH

US88 patents

⚠️ This page may combine multiple inventors who share the name “CHANDHOK MANISH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHANDHOK MANISH

INTEL CORP

Optics for extreme ultraviolet lithography

Enhancing photoresist performance using electric fields

Advanced lithography and self-assembled devices

Subtractively patterned interconnect structures for integrated circuits

Self-aligned hard masks with converted liners

Method for improved resolution of patterning using binary masks with pupil filters

Capacitor architectures in semiconductor devices

Interconnects with fully clad lines

Method of reducing sensitivity of EUV photoresists to out-of-band radiation and EUV photoresists formed according to the method

Advanced lithography and self-assembled devices

Reflective alignment grating

Line edge roughness reduction

Dipole illumination

Damage-resistant coatings for EUV lithography components

Advanced lithography and self-assembled devices

Advanced lithography and self-assembled devices

Dielectric helmet-based approaches for back end of line (BEOL) interconnect fabrication and structures resulting therefrom

Pitch division patterning approaches with increased overlay margin for back end of line (BEOL) interconnect fabrication and structures resulting therefrom

Structure and method to self align via to top and bottom of tight pitch metal interconnect layers

Method for improved resolution of patterning using binary masks with pupil filters

Method for improved resolution of patterning using binary masks with pupil filters

Planar slab vias for integrated circuit interconnects

Passivating silicide-based approaches for conductive via fabrication and structures resulting therefrom

Maskless air gap to prevent via punch through

Method for creating alternate hardmask cap interconnect structure with increased overlay margin

Subtractively patterned interconnect structures for integrated circuits

Integrated circuit with airgaps to control capacitance

Adjustable illumination source

Integrated circuits (IC&#39;s) with electro-migration (EM)—resistant segments in an interconnect level

Vias and gaps in semiconductor interconnects

Compensation of reflective mask effects in lithography systems

Contact over active gate structures with conductive trench contact taps for advanced integrated circuit structure fabrication

Self-assembled guided hole and via patterning over grating

Contact over active gate structures with conductive trench contact taps for advanced integrated circuit structure fabrication

Planar slab vias for integrated circuit interconnects

Self-assembled guided hole and via patterning over grating

Colored gratings in microelectronic structures

Contact over active gate structures with metal oxide layers to inhibit shorting

Dielectric helmet-based approaches for back end of line (BEOL) interconnect fabrication and structures resulting therefrom

Grating replication using helmets and topographically-selective deposition

Metal oxide nanoparticles as fillable hardmask materials

Grating replication using helmets and topographically-selective deposition

Metal oxide nanoparticles as fillable hardmask materials

Maskless air gap to prevent via punch through

Differentiated molecular domains for selective hardmask fabrication and structures resulting therefrom

Self-aligned via below subtractively patterned interconnect

Subtractively patterned interconnect structures for integrated circuits

Capacitor architectures in semiconductor devices

Capacitor architectures in semiconductor devices

CHANDHOK MANISH

Method of creating a maskless air gap in back end interconnects with double self-aligned vias

Integrated circuits (IC's) with electro-migration (EM)—resistant segments in an interconnect level