Inventor

GSTREIN FLORIAN

US71 patents

⚠️ This page may combine multiple inventors who share the name “GSTREIN FLORIAN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GSTREIN FLORIAN

INTEL CORP

Subtractive self-aligned via and plug patterning for back end of line (BEOL) interconnects

Advanced lithography and self-assembled devices

Precursor and process design for photo-assisted metal atomic layer deposition (ALD) and chemical vapor deposition (CVD)

Via blocking layer

Forming layers of materials over small regions by selective chemical reaction including limiting enchroachment of the layers over adjacent regions

Composite metal films and carbon nanotube fabrication

Metal oxide sensors and method of forming

Advanced lithography and self-assembled devices

Advanced lithography and self-assembled devices

Advanced lithography and self-assembled devices

Ligand-capped main group nanoparticles as high absorption extreme ultraviolet lithography resists

Microelectronic conductive routes and methods of making the same

Selective deposition utilizing sacrificial blocking layers for semiconductor devices

Metallization of fluorocarbon-based dielectric for interconnects

Method and apparatus to fabricate polymer arrays on patterned wafers using electrochemical synthesis

Lined photobucket structure for back end of line (BEOL) interconnect formation

Selective gate spacers for semiconductor devices

Selective gate spacers for semiconductor devices

Method for creating alternate hardmask cap interconnect structure with increased overlay margin

Self-aligned gate endcap (SAGE) architectures without fin end gap

Two-stage bake photoresist with releasable quencher

Method of fabricating a carbon nanotube interconnect structures

Contact over active gate structures with conductive trench contact taps for advanced integrated circuit structure fabrication

Self-assembled guided hole and via patterning over grating

Contact over active gate structures with conductive trench contact taps for advanced integrated circuit structure fabrication

Bottom-up fill dielectric materials for semiconductor structure fabrication and their methods of fabrication

Self-assembled guided hole and via patterning over grating

Colored gratings in microelectronic structures

Contact over active gate structures with metal oxide layers to inhibit shorting

Ligand-capped main group nanoparticles as high absorption extreme ultraviolet lithography resists

Metal oxide nanoparticles as fillable hardmask materials

Materials and layout design options for DSA on transition regions over active die

Selective gate spacers for semiconductor devices

Bottom-up fill dielectric materials for semiconductor structure fabrication and their methods of fabrication

Metal oxide nanoparticles as fillable hardmask materials

Differentiated molecular domains for selective hardmask fabrication and structures resulting therefrom

Backside wafer treatments to reduce distortions and overlay errors during wafer chucking

Lined photobucket structure for back end of line (BEOL) interconnect formation

Multifunctional molecules for selective polymer formation on conductive surfaces and structures resulting therefrom

Contact over active gate structures using directed self-assembly for advanced integrated circuit structure fabrication

Selective metal removal for conductive interconnects in integrated circuitry

ROMERO PATRICIO E

Selective area deposition of metal films by atomic layer deposition (ALD) and chemical vapor deposition (CVD)

Selective area deposition of metal films by atomic layer deposition (ALD) and chemical vapor deposition (CVD)

BLUM GMBH JULIUS

Hinge assembly

Hinge assembly

DUBIN VALERY M

Method and apparatus to fabricate polymer arrays on patterned wafers using electrochemical synthesis

Method and apparatus to fabricate polymer arrays on patterned wafers using electrochemical synthesis

JEZEWSKI CHRISTOPHER J

Cobalt based interconnects and methods of fabrication thereof

GSTREIN FLORIAN

Metallization of fluorocarbon-based dielectric for interconnects

CHANDHOK MANISH

Method of creating a maskless air gap in back end interconnects with double self-aligned vias