Inventor

FANG JIANMIN

US112 patents

⚠️ This page may combine multiple inventors who share the name “FANG JIANMIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FANG JIANMIN

LIN YAOJIAN

Semiconductor device with a vertical interconnect structure for 3-D FO-WLCSP

Semiconductor package with semiconductor core structure and method of forming the same

Semiconductor device and method of forming interconnect substrate for FO-WLCSP

Semiconductor package with semiconductor core structure and method of forming same

Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation

Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief

Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound

Semiconductor device and method of forming protection and support structure for conductive interconnect structure

Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures

Semiconductor device and method of forming bump structure with multi-layer UBM around bump formation area

Semiconductor device and method of forming an inductor within interconnect layer vertically separated from semiconductor die

Semiconductor device and method of making integrated passive devices

Semiconductor device and method of forming insulating layer around semiconductor die

Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures

Semiconductor device and method of forming an IPD over a high-resistivity encapsulant separated from other IPDS and baseband circuit

Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component

Semiconductor device and method of forming high-frequency circuit structure and method thereof

Semiconductor device and method of forming sacrificial protective layer to protect semiconductor die edge during singulation

Semiconductor device and method of forming vertical interconnect structure in substrate for IPD and baseband circuit separated by high-resistivity molding compound

Semiconductor device and method of forming a fan-out structure with integrated passive device and discrete component

STATS CHIPPAC LTD

Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP

Semiconductor package with semiconductor core structure and method of forming same

Semiconductor device and method of forming high-frequency circuit structure and method thereof

Semiconductor device and method for forming passive circuit elements with through silicon vias to backside interconnect structures

Semiconductor device and method of forming repassivation layer for robust low cost fan-out semiconductor package

Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor die

Semiconductor device and method of forming repassivation layer with reduced opening to contact pad of semiconductor die

Semiconductor device and method of forming integrated passive device module

Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP

Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLP-MLP)

Semiconductor device and method of embedding integrated passive devices into the package electrically interconnected using conductive pillars

Semiconductor device with integrated passive circuit and method of making the same using sacrificial substrate

Semiconductor device and method of forming shielding layer over integrated passive device using conductive channels

ZTE CORP

Reporting measurements for minimization of driving test in wireless communication

Method of performance information reporting

Method, network device, and system for implementing data processing, and storage medium

Method, network device, and system for implementing data processing, and storage medium

Handover method and apparatus

BIOSANTE PHARMACEUTICALS INC

Compositions and methods for enhanced expression of recombinant polypeptides from a single vector using a peptide cleavage site

Compositions and methods for enhanced expression of recombinant polypeptides from a single vector using a peptide cleavage site

AAV vector compositions and methods for enhanced expression of immunoglobulins using the same

CELL GENESYS INC

Compositions and methods for enhanced expression of immunoglobulins from a single vector using a peptide cleavage site

Compositions and methods for generating multiple polypeptides from a single vector using a virus derived peptide cleavage site, and uses thereof

YANTAI RC BIOTECHNOLOGIES

Fusion protein for antagonizing angiogenesis inducible factors and uses thereof

FGFR-Fc fusion proteins and the use thereof

CHENGDU KANGHONG BIOTECHNOLOGI

Angiogenesis-inhibiting chimeric protein and the use

FANG JIANMIN

TACI-Fc fusion proteins, methods of making and uses thereof

RAYBIOTECH LIFE INC

Covid-19 spike-ACE2 binding assay for drug and antibody screening

REMEGEN LTD

Anti-HER2 antibody and conjugate thereof

RayBiotech Life

COVID-19 spike-ACE2 binding assay for drug and antibody screening