Inventor
CHOU CHING-TSUN
US13 patents
⚠️ This page may combine multiple inventors who share the name “CHOU CHING-TSUN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
7 patentsUS7016304B2Mar 21, 2006
Link level retry scheme
INTEL CORP25 citations90
US7991875B2Aug 2, 2011
Link level retry scheme
INTEL CORP10 citations81
US10761849B2Sep 1, 2020
Processors, methods, systems, and instruction conversion modules for instructions with compact instruction encodings due to use of context of a prior instruction
INTEL CORP1 citations59
US10120686B2Nov 6, 2018
Eliminating redundant store instructions from execution while maintaining total store order
INTEL CORP0 citations51
US10019366B2Jul 10, 2018
Satisfying memory ordering requirements between partial reads and non-snoop accesses
INTEL CORP0 citations51
US9703712B2Jul 11, 2017
Satisfying memory ordering requirements between partial reads and non-snoop accesses
INTEL CORP0 citations51
US9058271B2Jun 16, 2015
Satisfying memory ordering requirements between partial reads and non-snoop accesses
INTEL CORP0 citations51
BEERS ROBERT H
3 patentsUS8694736B2Apr 8, 2014
Satisfying memory ordering requirements between partial reads and non-snoop accesses
BEERS ROBERT H5 citations82
US8250311B2Aug 21, 2012
Satisfying memory ordering requirements between partial reads and non-snoop accesses
BEERS ROBERT H5 citations71
US8205045B2Jun 19, 2012
Satisfying memory ordering requirements between partial writes and non-snoop accesses
BEERS ROBERT H0 citations39