Inventor

TAMURA HIROTAKA

JP102 patents

⚠️ This page may combine multiple inventors who share the name “TAMURA HIROTAKA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAMURA HIROTAKA

FUJITSU LTD

Clock generator for generating accurate and low-jitter clock

Receiver, transceiver circuit, signal transmission method, and signal transmission system

Signal transmission system having a timing adjustment circuit

Timing signal generating circuit, semiconductor integrated circuit device and semiconductor integrated circuit system to which the timing signal generating circuit is applied, and signal transmission system

Signal transmission system for transmitting signals between lsi chips, receiver circuit for use in the signal transmission system, and semiconductor memory device applying the signal transmission system

Output circuit device for clock signal distribution in high-speed signal transmission

Ferroelectric memory device

Timing signal generator for correctly transmitting a signal at high speed without waveform distortion

Feedback control for termination adjustment

Method of and apparatus for correctly transmitting signals at high speed without waveform distortion

Signal transmission system for transmitting signals between LSI chips, receiver circuit for use in the signal transmission system, and semiconductor memory device applying the signal transmission system

Receiver, transceiver circuit, signal transmission method, and signal transmission system

Buffer circuit device supplying a common mode voltage applicable to a next-stage circuit receiving output signals of the buffer circuit device

Receiver, hybrid circuit, driver circuit, and signal transmission system for bidirectional signal transmission for carrying out such signal transmission in both directions simultaneously

Electron device having a current channel of dielectric material

Timing signal generating circuit with a master circuit and slave circuits

Equalizing a signal for transmission

Output circuit device for clock signal distribution in high-speed signal transmission

System and method for automatic deskew across a high speed, parallel interconnection

Receiver, hybrid circuit, driver circuit, and signal transmission system for bidirectional signal transmission for carrying out such signal transmission in both directions simultaneously

System and method for automatic deskew across a high speed, parallel interconnection

Method of an apparatus for correctly transmitting signals at high speed without waveform distortion

Ferroelectric memory device and its drive method

Phase-locked loop circuit permitting reduction of circuit size

Automatic initialization and tuning across a high speed, plesiochronous, parallel link

Clock recovery circuit and receiver circuit for improving the error rate of signal reproduction

Reception circuit and semiconductor integrated circuit

Data recovery circuit, data recovery method and data receiving apparatus

Data reproduction circuit

Clock signal generating and distributing apparatus

Clock recovery circuit and data receiving circuit

Receiver circuit comprising equalizer

Parallel-serial conversion circuit and data receiving system

Timing signal generating circuit having simple configuration with low supply voltage and generating timing signals with high accuracy

Clock data recovery method and clock data recovery circuit

Receiver, transceiver circuit, signal transmission method, and signal transmission system

Receiver, transceiver circuit, signal transmission method, and signal transmission system

Signal transmission system for transmitting signals between lsi chips, receiver circuit for use in the signal transmission system, and semiconductor memory device applying the signal transmission system

Optimization device and control method of optimization device

Information processing apparatus, Ising device, and method for controlling information processing apparatus

Optimization apparatus, optimization method, and non-transitory computer-readable storage medium for storing optimization program

Clock generating circuit, serial-parallel conversion circuit, and information processing device

Signal transmission circuit, signal transmission system, and signal transmission method

Jitter reduction circuit

Peaking control circuit

TAMURA HIROTAKA

Integrated circuit including bypass signal path

Phase interpolator for a timing signal generating circuit

NEDOVIC NIKOLA

Clock and data recovery with a data aligner

SHIBASAKI TAKAYUKI

Clock signal distributing device

TOMITA YASUMOTO

Clock generation circuit and system