Inventor

AOUINI SADOK

CA53 patents

⚠️ This page may combine multiple inventors who share the name “AOUINI SADOK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AOUINI SADOK

CIENA CORP

Apparatus and methods for digital phase locked loop with analog proportional control function

Optical clock recovery using feedback phase rotator with non-linear compensation

Noise-shaping enhanced gated ring oscillator based analog-to-digital converters

Coarse-fine gain-tracking loop and method of operating

Fine resolution high speed linear delay element

Estimating clock phase error based on channel conditions

Successive approximation register analog to digital converter based phase-locked loop with programmable range

High bandwidth under-sampled successive approximation register analog to digital converter with nonlinearity minimization

High resolution successive approximation register analog to digital converter with factoring and background clock calibration

Apparatus and methods for high frequency clock generation

High-order phase tracking loop with segmented proportional and integral controls

High-order phase tracking loop with segmented proportional and integral controls

Extremely-fine resolution sub-ranging current mode Digital-Analog-Converter using Sigma-Delta modulators

Optical clock recovery using feedback phase rotator with non-linear compensation

Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter

Clock recovery circuits, systems and implementation for increased optical channel density

Built-in jitter loading and state of polarization generation to characterize optical transceivers

Apparatus and methods for a phase frequency detector with a wide operational range

Apparatus and methods for digital phase locked loop with analog proportional control function

Techniques and circuits for time-interleaved injection locked voltage controlled oscillators with jitter accumulation reset

Noise-shaping enhanced gated ring oscillator based analog-to-digital converters

Reducing non-linearities of a phase rotator

Digitally enhanced digital-to-analog converter resolution

Clock recovery circuits, systems and implementation for increased optical channel density

Techniques and circuits for on-chip jitter and phase noise measurement in a digital test environment

Phase skipping technique for high-speed, high-phase number delay locked loop

Reducing non-linearities of a phase rotator

Reducing non-linearities of a phase rotator

Apparatus and methods for low power frequency clock generation and distribution

High-order phase tracking loop with segmented proportional and integral controls

Highly linear phase rotators with continuous rotation

Apparatus and method for sigma-delta modulator quantization noise cancellation

Digitally enhanced digital-to-analog converter resolution

Low latency data handoff using phase rotation and clock gapping

Apparatus and method for Sigma-Delta modulator quantization noise cancellation

Apparatus and methods for digital fractional phase locked loop with a current mode low pass filter

Built-in jitter loading and state of polarization generation to characterize optical transceivers

High bandwidth under-sampled successive approximation register analog to digital converter with nonlinearity minimization

Apparatus and methods for high frequency clock generation

High resolution analog to digital converter with factoring and background clock calibration

Apparatus and methods for fractional synchronization using direct digital frequency synthesis

Resonant device improvement in PICs using spare devices to reduce power requirements

Multiphase clock generator

Method and apparatus for clock and data alignment that reduces power consumption

Successive approximation register based time-to-digital converter using a time difference amplifier

AOUINI SADOK

High order hybrid phase locked loop with digital scheme for jitter suppression

Generation of an analog Gaussian noise signal having predetermined characteristics

ROBERTS GORDON

Phase/frequency synthesis using periodic sigma-delta modulated bit-stream techniques

PARVIZI MAHDI

Quarter-rate charge-steering decision feedback equalizer (DFE)

PIKE JACOB

Quarter-rate charge-steering decision feedback equalizer (DFE) taps