Inventor

COPE BRYAN GARNETT

US5 patents

⚠️ This page may combine multiple inventors who share the name “COPE BRYAN GARNETT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ETA COMPUTE INC

4 patents

US10338930B2Jul 2, 2019

Dual-rail delay insensitive asynchronous logic processor with single-rail scan shift enable

ETA COMPUTE INC2 citations62

US10951212B2Mar 16, 2021

Self-timed processors implemented with multi-rail null convention logic and unate gates

ETA COMPUTE INC0 citations56

US10205453B2Feb 12, 2019

Self-timed processors implemented with multi-rail null convention logic and unate gates

ETA COMPUTE INC1 citations56

US10642759B2May 5, 2020

Interface from null convention logic to synchronous memory

ETA COMPUTE INC0 citations43

PTS CORP

1 patent

US6912608B2Jun 28, 2005

Methods and apparatus for pipelined bus

PTS CORP12 citations83