Inventor
CHAO CHI-YEU
US9 patents
⚠️ This page may combine multiple inventors who share the name “CHAO CHI-YEU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
7 patentsUS6748549B1Jun 8, 2004
Clocking an I/O buffer, having a selectable phase difference from the system clock, to and from a remote I/O buffer clocked in phase with the system clock
INTEL CORP48 citations92
US6671847B1Dec 30, 2003
I/O device testing method and apparatus
INTEL CORP73 citations92
US6407591B1Jun 18, 2002
Self-configurable clock input buffer compatible with high-voltage single-ended and low-voltage differential clock signals
INTEL CORP25 citations92
US6396309B1May 28, 2002
Clocked sense amplifier flip flop with keepers to prevent floating nodes
INTEL CORP33 citations91
US7404099B2Jul 22, 2008
Phase-locked loop having dynamically adjustable up/down pulse widths
INTEL CORP7 citations68
US6781428B2Aug 24, 2004
Input circuit with switched reference signals
INTEL CORP6 citations62
US6552570B2Apr 22, 2003
Input circuit with non-delayed time blanking
INTEL CORP2 citations62
FARADAY TECH CORP
2 patentsUS10797683B1Oct 6, 2020
Calibration circuit and associated calibrating method capable of precisely adjusting clocks with distorted duty cycles and phases
FARADAY TECH CORP18 citations83
US11775003B2Oct 3, 2023
Clock calibration module, high-speed receiver, and associated calibration method
FARADAY TECH CORP0 citations50