Inventor · disambiguated record
Jonathan Sweedler
Also filed as: SWEEDLER JONATHAN · SWEEDLER JONATHAN B
13 granted patents·7 pending applications·289 citations·filing 1992–2025
93Inventor score
Top patents by PatentIndex Score
20 records- 0198US11891036B2Leveraging rear-view sensors for automatic emergency braking in autonomous machine applicationsNVIDIA CORP·Filed 2022·Granted Feb 6, 2024·7 cites·20 claims
- 0298US11364883B2Leveraging rear-view sensors for automatic emergency braking in autonomous machine applicationsNVIDIA CORP·Filed 2020·Granted Jun 21, 2022·4 cites·20 claims
- 0394US11644834B2Systems and methods for safe and reliable autonomous vehiclesNVIDIA CORP·Filed 2018·Granted May 9, 2023·50 cites·60 claims
- 0490US2025353475A1Braking control for autonomous and semi-autonomous systems and applicationsNVIDIA CORP·Filed 2025·Application pending·0 cites
- 0587US12403873B2Leveraging rear-view sensors for automatic emergency braking in autonomous machine applicationsNVIDIA CORP·Filed 2024·Granted Sep 2, 2025·0 cites·20 claims
- 0676US5367650AMethod and apparauts for parallel exchange operation in a pipelined processorINTEL CORP·Filed 1992·Granted Nov 22, 1994·73 cites·22 claims
- 0775US7424571B2Array machine context data memoryGIGAFIN NETWORKS INC·Filed 2005·Granted Sep 9, 2008·7 cites·19 claims
- 0874US2023176577A1Systems and methods for safe and reliable autonomous vehiclesNVIDIA CORP·Filed 2022·Application pending·0 cites
- 0972US2024045426A1Systems and methods for safe and reliable autonomous vehiclesNVIDIA CORP·Filed 2023·Application pending·0 cites
- 1070US7398356B2Contextual memory interface for network processorMISTLETOE TECHNOLOGIES INC·Filed 2005·Granted Jul 8, 2008·6 cites·26 claims
- 1168US5257216AFloating point safe instruction recognition apparatusINTEL CORP·Filed 1992·Granted Oct 26, 1993·45 cites·8 claims
- 1267US5559977AMethod and apparatus for executing floating point (FP) instruction pairs in a pipelined processor by stalling the following FP instructions in an execution stageINTEL CORP·Filed 1994·Granted Sep 24, 1996·51 cites·11 claims
- 1357US5235533AStore rounding in a floating point unitINTEL CORP·Filed 1992·Granted Aug 10, 1993·33 cites·5 claims
- 1454US7451268B2Arbiter for array machine context data memoryGIGAFIN NETWORKS INC·Filed 2005·Granted Nov 11, 2008·1 cites·18 claims
- 1541US2007022275A1Processor cluster implementing conditional instruction skipMISTLETOE TECHNOLOGIES INC·Filed 2005·Application pending·0 cites
- 1639US2007043871A1Debug non-terminal symbol for parser error handlingMISTLETOE TECHNOLOGIES INC·Filed 2005·Application pending·0 cites
- 1739US2007016906A1Efficient hardware allocation of processes to processorsMISTLETOE TECHNOLOGIES INC·Filed 2005·Application pending·0 cites
- 1837US2006026377A1Lookup interface for array machine context data memorySIKDAR SOMSUBHRA·Filed 2005·Application pending·0 cites
- 1935US5307301AFloating point safe instruction recognition methodINTEL CORP·Filed 1993·Granted Apr 26, 1994·7 cites·7 claims
- 2033US5351207AMethods and apparatus for subtraction with 3:2 carry-save addersINTEL CORP·Filed 1992·Granted Sep 27, 1994·5 cites·16 claims
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →