Inventor
MCGAUGHY BRUCE W
US29 patents
⚠️ This page may combine multiple inventors who share the name “MCGAUGHY BRUCE W”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
19 patentsUS7181383B1Feb 20, 2007
System and method for simulating a circuit having hierarchical structure
CADENCE DESIGN SYSTEMS INC71 citations94
US7835890B2Nov 16, 2010
Hot carrier circuit reliability simulation
CADENCE DESIGN SYSTEMS INC13 citations92
US7328143B2Feb 5, 2008
Systems and methods for efficiently simulating analog behavior of designs having hierarchical structure
CADENCE DESIGN SYSTEMS INC18 citations92
US7292968B2Nov 6, 2007
Hot carrier circuit reliability simulation
CADENCE DESIGN SYSTEMS INC28 citations92
US7257525B2Aug 14, 2007
Systems and methods for efficiently simulating analog behavior of designs having hierarchical structure
CADENCE DESIGN SYSTEMS INC14 citations92
US7024652B1Apr 4, 2006
System and method for adaptive partitioning of circuit components during simulation
CADENCE DESIGN SYSTEMS INC34 citations92
US6928626B1Aug 9, 2005
System and method for modeling of circuit components
CADENCE DESIGN SYSTEMS INC19 citations92
US7409328B1Aug 5, 2008
System and method for communicating simulation solutions between circuit components in a hierarchical data structure
CADENCE DESIGN SYSTEMS INC28 citations91
US7143021B1Nov 28, 2006
Systems and methods for efficiently simulating analog behavior of designs having hierarchical structure
CADENCE DESIGN SYSTEMS INC33 citations91
US7243313B1Jul 10, 2007
System and method for reducing the size of RC circuits
CADENCE DESIGN SYSTEMS INC20 citations86
US7415403B2Aug 19, 2008
Systems and methods for efficiently simulating analog behavior of designs having hierarchical structure
CADENCE DESIGN SYSTEMS INC11 citations84
US7434183B2Oct 7, 2008
Method and system for validating a hierarchical simulation database
CADENCE DESIGN SYSTEMS INC14 citations83
US7392170B1Jun 24, 2008
System and method for dynamically compressing circuit components during simulation
CADENCE DESIGN SYSTEMS INC16 citations83
US7272805B2Sep 18, 2007
System and method for converting a flat netlist into a hierarchical netlist
CADENCE DESIGN SYSTEMS INC15 citations79
US7269541B1Sep 11, 2007
System and method for supporting multi-rate simulation of a circuit having hierarchical data structure
CADENCE DESIGN SYSTEMS INC9 citations73
US7933747B2Apr 26, 2011
Method and system for simulating dynamic behavior of a transistor
CADENCE DESIGN SYSTEMS INC4 citations62
US7836419B1Nov 16, 2010
Method and system for partitioning integrated circuits
CADENCE DESIGN SYSTEMS INC3 citations62
US7412681B1Aug 12, 2008
DC path checking in a hierarchical circuit design
CADENCE DESIGN SYSTEMS INC3 citations62
US7373289B2May 13, 2008
Electrical isomorphism
CADENCE DESIGN SYSTEMS INC4 citations60
PROPLUS ELECTRONICS CO LTD
3 patentsUS10002217B2Jun 19, 2018
Region based device bypass in circuit simulation
PROPLUS ELECTRONICS CO LTD1 citations46
US9779192B2Oct 3, 2017
Multi-rate parallel circuit simulation
PROPLUS ELECTRONICS CO LTD0 citations40
US9804894B2Oct 31, 2017
Dynamic load balancing in circuit simulation
PROPLUS ELECTRONICS CO LTD0 citations30