P

Inventor

KWANG CHUA SWEE

SG26 patents
⚠️ This page may combine multiple inventors who share the name “KWANG CHUA SWEE”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MICRON TECHNOLOGY INC

24 patents
US6727116B2Apr 27, 2004

Semiconductor devices including peripherally located bond pads, assemblies, packages, and methods

MICRON TECHNOLOGY INC149 citations99
US6611052B2Aug 26, 2003

Wafer level stackable semiconductor package

MICRON TECHNOLOGY INC261 citations99
US6582992B2Jun 24, 2003

Stackable semiconductor package and wafer level fabrication method

MICRON TECHNOLOGY INC283 citations99
US7115984B2Oct 3, 2006

Semiconductor devices including peripherally located bond pads, intermediates thereof, assemblies, and packages including the semiconductor devices, and support elements for the semiconductor devices

MICRON TECHNOLOGY INC67 citations98
US6855572B2Feb 15, 2005

Castellation wafer level packaging of integrated circuit chips

MICRON TECHNOLOGY INC96 citations98
US6894386B2May 17, 2005

Apparatus and method for packaging circuits

MICRON TECHNOLOGY INC69 citations97
US6949407B2Sep 27, 2005

Castellation wafer level packaging of integrated circuit chips

MICRON TECHNOLOGY INC42 citations96
US6818977B2Nov 16, 2004

Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assemblies and packages including such semiconductor devices or packages

MICRON TECHNOLOGY INC60 citations96
US7358154B2Apr 15, 2008

Method for fabricating packaged die

MICRON TECHNOLOGY INC30 citations95
US7723831B2May 25, 2010

Semiconductor package having die with recess and discrete component embedded within the recess

MICRON TECHNOLOGY INC24 citations93
US7679179B2Mar 16, 2010

Castellation wafer level packaging of integrated circuit chips

MICRON TECHNOLOGY INC8 citations92
US7528477B2May 5, 2009

Castellation wafer level packaging of integrated circuit chips

MICRON TECHNOLOGY INC10 citations92
US7285850B2Oct 23, 2007

Support elements for semiconductor devices with peripherally located bond pads

MICRON TECHNOLOGY INC26 citations92
US7226809B2Jun 5, 2007

Semiconductor devices and semiconductor device components with peripherally located, castellated contacts, assemblies and packages including such semiconductor devices or packages and associated methods

MICRON TECHNOLOGY INC15 citations92
US8008126B2Aug 30, 2011

Castellation wafer level packaging of integrated circuit chips

MICRON TECHNOLOGY INC7 citations84
US7964946B2Jun 21, 2011

Semiconductor package having discrete components and system containing the package

MICRON TECHNOLOGY INC10 citations84
US7807502B2Oct 5, 2010

Method for fabricating semiconductor packages with discrete components

MICRON TECHNOLOGY INC10 citations84
US7675169B2Mar 9, 2010

Apparatus and method for packaging circuits

MICRON TECHNOLOGY INC9 citations82
US10431531B2Oct 1, 2019

Semiconductor dies with recesses, associated leadframes, and associated systems and methods

MICRON TECHNOLOGY INC3 citations73
US9679834B2Jun 13, 2017

Semiconductor dies with recesses, associated leadframes, and associated systems and methods

MICRON TECHNOLOGY INC2 citations73
US7276387B2Oct 2, 2007

Castellation wafer level packaging of integrated circuit chips

MICRON TECHNOLOGY INC2 citations62
US10074599B2Sep 11, 2018

Semiconductor dies with recesses, associated leadframes, and associated systems and methods

MICRON TECHNOLOGY INC0 citations52
US10811278B2Oct 20, 2020

Method for packaging circuits

MICRON TECHNOLOGY INC0 citations49
US10453704B2Oct 22, 2019

Method for packaging circuits

MICRON TECHNOLOGY INC0 citations49

KWANG CHUA SWEE

1 patent

POO CHIA YONG

1 patent