Inventor

OLGIATI ANDREA

US50 patents

⚠️ This page may combine multiple inventors who share the name “OLGIATI ANDREA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

OLGIATI ANDREA

AMAZON TECH INC

Image compression and decompression using embeddings

Incremental block compression

Random access to decompressed blocks

Memory management unit for shared memory allocation

Person tracking across video instances

Automatically scaling compute resources for heterogeneous workloads

Deep learning processing of video

Attached accelerator scaling

Scalable distributed data processing and indexing

Streaming-based deep learning models for computer vision tasks

Prioritized scheduling of data store access requests

Memory synchronization in a distributed computing system

Automated problem detection for machine learning models

Automated form understanding via layout agnostic identification of keys and corresponding values

Grammar-based automated generation of annotated synthetic form training data for machine learning

Framework integration for instance-attachable accelerator

Layout-agnostic complex document processing system

Adaptive machine learning training via in-flight feature modification

Selective identity recognition utilizing object tracking

Data statistics service

Memory management unit for shared memory allocation

Fault-tolerant accelerator based inference service

Attached accelerator based inference service

Scalable distributed data processing and indexing

Resource management techniques to reduce startup overhead for machine learning tasks

GPU code injection to summarize machine learning training data

Dataset suitability check for machine learning

Analysis of video content

Efficient identification of objects in videos using motion information

Client-configurable retention periods for machine learning service-managed resources

Client-configurable retention periods for machine learning service-managed resources

Improper neural network input detection and handling

Attached accelerator selection and placement

Video analysis method and system

Background incremental deletion cleanup techniques at storage services

Debugging and profiling of machine learning model training

Compiled query execution and debugging

ALTERA CORP

Non-intrusive monitoring and control of integrated circuits

Non-intrusive monitoring and control of integrated circuits

Non-intrusive monitoring and control of integrated circuits

Non-intrusive monitoring and control of integrated circuits

Non-intrusive monitoring and control of integrated circuits

HEWLETT PACKARD DEVELOPMENT CO

Memory and instructions in computer architecture containing processor and coprocessor

Computer architecture containing processor and decoupled coprocessor

PANASONIC EUROP LTD

Methods and systems for reducing leakage current in semiconductor circuits

Methods and systems for reducing leakage current in semiconductor circuits

HEWLETT PACKARD CO

Method of using primary and secondary processors

ELIXENT LTD

Methods and systems for reducing leakage current in semiconductor circuits

PANASONIC CORP

Loosely-biased heterogeneous reconfigurable arrays

PRICE NEIL

Programmable logic device