Inventor

KIM SI-HONG

KR28 patents

⚠️ This page may combine multiple inventors who share the name “KIM SI-HONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KIM SI-HONG

SAMSUNG ELECTRONICS CO LTD

Method of controlling on-die termination and system performing the same

Memory device and memory system having the same

AC-coupling phase interpolator and delay-locked loop using the same

Semiconductor device capable of testing a transmission line for an impedance calibration code

Method of controlling on-die termination and system performing the same

Memory device for supporting command bus training mode and method of operating the same

Method of controlling on-die termination and system performing the same

Memory device and memory system having the same

Memory device for supporting command bus training mode and method of operating the same

Memory device for supporting command bus training mode and method of operating the same

Method of controlling on-die termination and system performing the same

Memory device and method for supporting command bus training mode based on one data signal

Temperature sensing circuit of semiconductor device

MICRON TECHNOLOGY INC

DC voltage regulators with demand-driven power management

DC voltage regulators with demand-driven power management

Memory with DQS pulse control circuitry, and associated systems, devices, and methods

Memory array with compensated word line access delay

Memory array with compensated word line access delay

Timing circuit having tuned temperature dependency

HYNIX SEMICONDUCTOR INC

Semiconductor memory device, and method for testing the same

Memory device with improved output operation margin

Data input unit of synchronous semiconductor memory device, and data input method using the same

Semiconductor memory device having sense amplifier and method for driving sense amplifier

Delay locked loop DLL in semiconductor device

KIM SI-HONG

Data output buffer and memory device

Memory controller with reduced power consumption, memory device, and memory system

Apparatus and method for latency control in high frequency synchronous semiconductor device

OH TAE-YOUNG

Stacked semiconductor memory device, memory system including the same, and method of repairing defects of through silicon vias