Inventor

HYTHA MAREK

US69 patents

⚠️ This page may combine multiple inventors who share the name “HYTHA MAREK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HYTHA MAREK

ATOMERA INC

Semiconductor device including resonant tunneling diode structure having a superlattice

CMOS image sensor including superlattice to enhance infrared light absorption

Method for making a semiconductor device including a resonant tunneling diode structure having a superlattice

Method for making a semiconductor device including a resonant tunneling diode with electron mean free path control layers

Semiconductor device including a resonant tunneling diode structure with electron mean free path control layers

Method of making a semiconductor device with a buried insulating layer formed by annealing a superlattice

Semiconductor device including superlattice structures with reduced defect densities

Method for making a varactor with hyper-abrupt junction region including a superlattice

Method for making a FINFET including source and drain dopant diffusion blocking superlattices to reduce contact resistance

Semiconductor device including body contact dopant diffusion blocking superlattice having reduced contact resistance

Varactor with hyper-abrupt junction region including a superlattice

Method for making semiconductor device including body contact dopant diffusion blocking superlattice to reduce contact resistance

Semiconductor device with metal-semiconductor contacts including oxygen insertion layer to constrain dopants and related methods

Method for making a FINFET having reduced contact resistance

Semiconductor devices including hyper-abrupt junction region including a superlattice

Varactor with hyper-abrupt junction region including spaced-apart superlattices

Method for making semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance

Method for making superlattice structures with reduced defect densities

Method for making a semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice

Method for making a semiconductor device having reduced contact resistance

Semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance

FINFET including source and drain regions with dopant diffusion blocking superlattice layers to reduce contact resistance

Semiconductor device including compound semiconductor materials and an impurity and point defect blocking superlattice

Method for making CMOS image sensor including superlattice to enhance infrared light absorption

Gate-all-around (GAA) device including a superlattice

Semiconductor device including a superlattice and enriched silicon 28 epitaxial layer

Method for making semiconductor device including superlattice with oxygen and carbon monolayers

RJ MEARS LLC

Method for making a semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel

Method for making a semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure

Method for making semiconductor device including band-engineered superlattice

Semiconductor device including band-engineered superlattice having 3/1-5/1 germanium layer structure

Semiconductor device including band-engineered superlattice

Semiconductor device including band-engineered superlattice

Semiconductor device including band-engineered superlattice

Semiconductor device including MOSFET having band-engineered superlattice

Semiconductor device including band-engineered superlattice

Method for making semiconductor device including band-engineered superlattice

Method for making semiconductor device including band-engineered superlattice

Method for making a semiconductor device including band-engineered superlattice using intermediate annealing

Method for making semiconductor device including band-engineered superlattice

MEARS TECHNOLOGIES INC

Semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel

Semiconductor device including MOSFET having band-engineered superlattice

Multiple-wavelength opto-electronic device including a superlattice

Method for making a multiple-wavelength opto-electronic device including a superlattice

Semiconductor device comprising a lattice matching layer

Method for making a semiconductor device comprising a lattice matching layer

Methods of making spintronic devices with constrained spintronic dopant

Method for making an electronic device including a poled superlattice having a net electrical dipole moment

Method for making a semiconductor device comprising a superlattice dielectric interface layer

MEARS ROBERT J

Multiple-wavelength opto-electronic device including a superlattice