P

Inventor

HU CHU-WEI

TW19 patents
⚠️ This page may combine multiple inventors who share the name “HU CHU-WEI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TAIWAN SEMICONDUCTOR MFG

11 patents
US6444544B1Sep 3, 2002

Method of forming an aluminum protection guard structure for a copper metal structure

TAIWAN SEMICONDUCTOR MFG76 citations96
US6287926B1Sep 11, 2001

Self aligned channel implant, elevated S/D process by gate electrode damascene

TAIWAN SEMICONDUCTOR MFG36 citations92
US6211069B1Apr 3, 2001

Dual damascene process flow for a deep sub-micron technology

TAIWAN SEMICONDUCTOR MFG37 citations92
US6451679B1Sep 17, 2002

Ion mixing between two-step titanium deposition process for titanium salicide CMOS technology

TAIWAN SEMICONDUCTOR MFG32 citations90
US6169003B1Jan 2, 2001

Method for forming a MOS device with an elevated source and drain, and having a self-aligned channel input

TAIWAN SEMICONDUCTOR MFG20 citations89
US6583017B2Jun 24, 2003

Self aligned channel implant, elevated S/D process by gate electrode damascene

TAIWAN SEMICONDUCTOR MFG8 citations73
US6207538B1Mar 27, 2001

Method for forming n and p wells in a semiconductor substrate using a single masking step

TAIWAN SEMICONDUCTOR MFG14 citations73
US6074905AJun 13, 2000

Formation of a thin oxide protection layer at poly sidewall and area surface

TAIWAN SEMICONDUCTOR MFG11 citations73
US6790756B2Sep 14, 2004

Self aligned channel implant, elevated S/D process by gate electrode damascene

TAIWAN SEMICONDUCTOR MFG2 citations62
US6951803B2Oct 4, 2005

Method to prevent passivation layer peeling in a solder bump formation process

TAIWAN SEMICONDUCTOR MFG3 citations57
US6787470B2Sep 7, 2004

Sacrificial feature for corrosion prevention during CMP

TAIWAN SEMICONDUCTOR MFG0 citations52

MEDIATEK INC

6 patents

FAN SHENG-HUNG

1 patent

LEE CHU-SHENG

1 patent