Inventor

KLINK ERICH

DE35 patents

⚠️ This page may combine multiple inventors who share the name “KLINK ERICH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KLINK ERICH

IBM

Structure for reducing cross-talk in VLSI circuits and method of making same using filled channels to minimize cross-talk

Integrated circuit package

Module power distribution network

Method and system for quantifying the integrity of an on-chip power supply network

Tunable on-chip capacity

Testable on-chip capacity

Two-stage power noise filter with on and off chip capacitors

Multilayer module with thinfilm redistribution area

Mesh planes for multilayer module

High density semiconductor memory module using split finger lead frame

Input signal redriver for semiconductor modules

Integrated circuit package

MCM—MLC technology

System and method for noise reduction in multi-layer ceramic packages

System and method for automatic insertion of on-chip decoupling capacitors

Method for reducing a transient thermal mismatch

Determining the current return path integrity in an electric device connected or connectable to a further device

Method of and circuit arrangement for reading and/or writing an integrated semiconductor storage with storage cells in MTL (I2 L) technology

Via/BSM pattern optimization to reduce DC gradients and pin current density on single and multi-chip modules

Storage cell simulation for generating a reference voltage for semiconductor stores in mtl technology

IIL With partially spaced collars

Method for delta-noise reduction

Phase splitter with integrated latch circuit

Highly integrated semiconductor structure providing a diode-resistor circuit configuration

Determining the current return path integrity in an electric device connected or connectable to a further device

Printed circuit board and chip module

Phase splitter with latch

Method for increasing wiring channels/density under dense via fields

Wiring structure having rotated wiring layers

Method and structure for reducing power noise

Circuit on a printed circuit board

Determining the current return path integrity in an electric device connected or connectable to a further device

FRECH ROLAND

Noise reducing circuit arrangement

Method for determining the current return path integrity in an electric device connected or connectable to a further device

Determining the current return path integrity in an electric device connected or connectable to a further device