Inventor

TOBIN PHILIP J

US52 patents

⚠️ This page may combine multiple inventors who share the name “TOBIN PHILIP J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TOBIN PHILIP J

MOTOROLA INC

Method for manufacturing a high dielectric constant gate oxide for use in semiconductor integrated circuits

Method for forming a semiconductor device with an opening in a dielectric layer

CMOS semiconductor devices and method of formation

Process for forming a semiconductor device

Methods of formation of semiconductor composite gate dielectric having multiple incorporated atomic dopants

Process for fabricating a MOSFET device having reduced reverse short channel effects

Process to incorporate nitrogen at an interface of a dielectric layer in a semiconductor device

Process for fabricating a semiconductor device having a high reliability dielectric material

Selective removal of a metal oxide dielectric

Method for forming high dielectric constant metal oxides

Method for forming a semiconductor device having a nitrided oxide dielectric layer

Process for forming high purity thin films

Method of producing titanium nitride MOS device gate electrode

Process for forming a semiconductor device

Method for forming a conductive structure having a composite or amorphous barrier layer

Method of formation of semiconductor gate dielectric

Method for forming a fluorinated nitrogen containing dielectric

Method for forming a thin film transistor

Surface denuding of silicon wafer

Method for locos isolation using a framed oxidation mask and a polysilicon buffer layer

Method for making a w/tin contact

Transistor with layered high-K gate dielectric and method therefor

Titanium nitride MOS device gate electrode and method of producing

Process for forming a structure

Process for forming field isolation and a structure over a semiconductor substrate

Method for forming electrical isolation in an integrated circuit device

Method of removing contaminants

Selective LPCVD tungsten deposition by nitridation of a dielectric

Semiconductor device and a process for forming the same

Process for forming a semiconductor device and a conductive structure

Method for forming a semiconductor device

Process for reducing halogen concentration in a material layer during semiconductor device fabrication

Thin film transistor and method of formation

Polycrystalline silicon device electrode and method

Process for forming field isolation

Semiconductor device having a metal containing layer overlying a gate dielectric

Encapsulation method for localized oxidation of silicon

Selective metal oxide removal performed in a reaction chamber in the absence of RF activation

Process for plugging defects in a dielectric layer of a semiconductor device

Epitaxial CMOS by oxygen implantation

Denuding a semiconductor substrate

FREESCALE SEMICONDUCTOR INC

Capped dual metal gate transistors for CMOS process and method for making the same

Electronic device including dielectric layer, and a process for forming the electronic device

Method for forming a layer using a purging gas in a semiconductor process

Method of manufacturing SOI template layer

Method for fabricating dual-metal gate device

Method of making metal gate transistors

Electronic device comprising a gate electrode including a metal-containing layer having one or more impurities and a process for forming the same

Electronic device comprising a gate electrode including a metal-containing layer having one or more impurities

Semiconductor device comprising a transistor having a counter-doped channel region and method for forming the same