Inventor
YEUNG RAYMOND CHEUNG
US11 patents
⚠️ This page may combine multiple inventors who share the name “YEUNG RAYMOND CHEUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
9 patentsUS7669038B2Feb 23, 2010
Method and apparatus for back to back issue of dependent instructions in an out of order issue queue
IBM18 citations92
US7627742B2Dec 1, 2009
Method and apparatus for conserving power by throttling instruction fetching when a processor encounters low confidence branches in an information handling system
IBM27 citations92
US7000047B2Feb 14, 2006
Mechanism for effectively handling livelocks in a simultaneous multithreading processor
IBM36 citations92
US7631308B2Dec 8, 2009
Thread priority method for ensuring processing fairness in simultaneous multi-threading microprocessors
IBM12 citations84
US8006070B2Aug 23, 2011
Method and apparatus for inhibiting fetch throttling when a processor encounters a low confidence branch instruction in an information handling system
IBM9 citations83
US7925853B2Apr 12, 2011
Method and apparatus for controlling memory array gating when a processor executes a low confidence branch instruction in an information handling system
IBM8 citations83
US7380104B2May 27, 2008
Method and apparatus for back to back issue of dependent instructions in an out of order issue queue
IBM3 citations62
US7650486B2Jan 19, 2010
Dynamic recalculation of resource vector at issue queue for steering of dependent instructions
IBM0 citations52
US7490226B2Feb 10, 2009
Method using vector component comprising first and second bits to regulate movement of dependent instructions in a microprocessor
IBM0 citations41