Inventor

GIVENS JOHN H

US52 patents

⚠️ This page may combine multiple inventors who share the name “GIVENS JOHN H”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

GIVENS JOHN H

MICRON TECHNOLOGY INC

Method for fabricating conductive components in microelectronic devices and substrate structures thereof

Method and apparatus for forming features in holes, trenches and other voids in the manufacturing of microelectronic devices

Method for improved metal fill by treatment of mobility layers

Method for improved bottom and side wall coverage of high aspect ratio features

Trench/hole fill processes for semiconductor fabrication

Method of forming contact vias and interconnect channels in a dielectric layer stack with a single mask

Sputter deposition method for improved bottom and side wall coverage of high aspect ratio features

Electrical connection for a semiconductor structure

Method for metal fill by treatment of mobility layers

Method for improved metal fill by treatment of mobility layers

Integrated circuit metallization with superconductor BEOL wiring

Method of making an interconnect structure

Metal fill by treatment of mobility layers

Alloy for enhanced filling of high aspect ratio dual damascene structures

High aspect ratio metallization structures for shallow junction devices, and methods of forming the same

Method of forming an electrical connection

Method of forming a sputtering apparatus

In situ preclean in a PVD chamber with a biased substrate configuration

Utilization of energy absorbing layer to improve metal flow and fill in a novel interconnect structure

Semiconductor device with metal fill by treatment of mobility layers including forming a refractory metal nitride using TMEDT

Thermal processing of metal alloys for an improved CMP process in integrated circuit fabrication

Thermal processing of metal alloys for an improved CMP process in integrated circuit fabrication

Methods for utilization of disappearing silicon hard mask for fabrication of semiconductor structures

Processing methods for providing metal-comprising materials within high aspect ratio openings

Utilization of disappearing silicon hard mask for fabrication of semiconductor structures

Utilization of energy absorbing layer to improve metal flow and fill in a novel interconnect structure

Semiconductor processing methods of forming integrated circuitry and integrated circuitry constructions

Thermal processing of metal alloys for an improved CMP process in integrated circuit fabrication

Reduced RC delay between adjacent substrate wiring lines

Method for enhanced filling of high aspect ratio dual damascene structures

Method for fabricating conductive components in microelectronic devices and substrate structures therefor

Method for making an electrical contact to a node location and process for forming a conductive line or other circuit component

Method for making an electrical contact to a node location and process for forming a conductive line or other circuit component

Reduced RC delay between adjacent substrate wiring lines

Reduced RC delay between adjacent substrate wiring lines

High aspect ratio metallization structures for shallow junction devices, and methods of forming the same

Deposition chamber with a biased substrate configuration

Processing methods for providing metal-comprising materials within high aspect ratio openings

Three-level unitary interconnect structure

Utilization of disappearing silicon hard mask for fabrication of semiconductor structures

Reduced RC delay between adjacent substrate wiring lines

Processing methods for providing metal-comprising materials within high aspect ratio openings

Method for making an electrical contact to a node location and process for forming a conductive line or other circuit component

Method making integrated circuit metallization with superconductor BEOL wiring

Utilization of disappearing silicon hard mask for fabrication of semiconductor structures

Semiconductor processing methods of forming integrated circuitry

IBM

Process for improving sheet resistance of an integrated circuit device gate

Plug strap process utilizing selective nitride and oxide etches

Process for making low-leakage contacts

US ARMY

Method of making mixed metal oxide coated substrates