Inventor
KUROKAWA YASUNAGA
JP3 patents
Patents
3 patentsUS6184476B1Feb 6, 2001
Thin multi-layer circuit board having a remodeling pad layer and a metallic barrier layer with an exclusion zone
FUJITSU LTD10 citations72
US5679268AOct 21, 1997
Thin multi-layer circuit board and process for fabricating the same
FUJITSU LTD9 citations72
US6389686B2May 21, 2002
Process for fabricating a thin multi-layer circuit board
FUJITSU LTD4 citations61