Inventor

ISA SATOSHI

JP44 patents

⚠️ This page may combine multiple inventors who share the name “ISA SATOSHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ISA SATOSHI

ELPIDA MEMORY INC

Stacked semiconductor package

Semiconductor apparatus capable of preventing occurrence of multiple reflection, driving method, and setting method thereof

Inductance analysis system and method and program therefor

Semiconductor stack package having wiring extension part which has hole for wiring

Semiconductor device

Semiconductor memory device capable of improving quality of voltage waveform given in a signal interconnection layer

Semiconductor device

Semiconductor device

Method for designing semiconductor apparatus, system for aiding to design semiconductor apparatus, computer program product therefor and semiconductor package

Semiconductor device

Semiconductor package with bypass capacitor

Method for manufacturing semiconductor device, semiconductor device and apparatus comprising same

Semiconductor device

Semiconductor device including semiconductor chip with two pad rows

Method for designing device, system for aiding to design device, and computer program product therefor

Semiconductor device

Semiconductor device including ground and power-supply planes and a dielectric layer between the ground and power-supply planes

NEC CORP

Semiconductor memory device with redundancy circuit

Semiconductor memory device for shortening the set up time and hold time of control signals in synchronous DRAM

Semiconductor memory device having redundant memory cells

Semiconductor memory device

Semiconductor memory device and a driving method of the same

Semiconductor memory device having N-channel MOS transistor for pulling up PMOS sources of sense amplifiers

Semiconductor memory device

Semiconductor memory having redundancy memory decoder circuit

Semiconductor memory device having reduced component count and lower wiring density

MICRON TECHNOLOGY INC

Apparatuses comprising semiconductor dies in face-to-face arrangements

Stacked die package including a first die coupled to a substrate through direct chip attachment and a second die coupled to the substrate through wire bonding, and related methods and devices

Stacked die package including a first die coupled to a substrate through direct chip attachment and a second die coupled to the substrate through wire bonding and related methods, devices and apparatuses

Apparatuses comprising semiconductor dies in face-to-face arrangements

Apparatuses comprising semiconductor dies in face-to-face arrangements

TAKEDA HIROMASA

Semiconductor device

Semiconductor device

Semiconductor device that suppresses malfunctions due to noise generated in internal circuit

Semiconductor device including plural electrode pads

PS4 LUXCO SARL

Semiconductor device

Semiconductor device

Semiconductor device stack with bonding layer and wire retaining member

ISA SATOSHI

Semiconductor device with respective electrode pad rows and respective external electrodes electrically connected and arranged in the respective end portions of the substrate

Semiconductor device having wiring layers with power-supply plane and ground plane

ITAYA SATOSHI

Semiconductor device with additional power supply paths

HASEGAWA YU

Semiconductor device stack with bonding layer and wire retaining member

ELPIDA MEMORY

Method for designing semiconductor package, system for aiding to design semiconductor package, and computer program product therefor

KOSHIISHI KAZUTAKA

Semiconductor device