Inventor
CZAGAS JOSEPH A
US9 patents
⚠️ This page may combine multiple inventors who share the name “CZAGAS JOSEPH A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTERSIL INC
5 patentsUS7285475B2Oct 23, 2007
Integrated circuit having a device wafer with a diffused doped backside layer
INTERSIL INC12 citations92
US6946364B2Sep 20, 2005
Integrated circuit having a device wafer with a diffused doped backside layer
INTERSIL INC6 citations73
US6867495B2Mar 15, 2005
Integrated circuit having a device wafer with a diffused doped backside layer
INTERSIL INC9 citations73
US6667523B2Dec 23, 2003
Highly linear integrated resistive contact
INTERSIL INC10 citations72
US7110933B2Sep 19, 2006
Line modeling tool
INTERSIL INC2 citations59
HARRIS CORP
2 patentsUS6362075B1Mar 26, 2002
Method for making a diffused back-side layer on a bonded-wafer with a thick bond oxide
HARRIS CORP13 citations81
US6403472B1Jun 11, 2002
Method of forming resistive contacts on intergrated circuits with mobility spoiling ions including high resistive contacts and low resistivity silicide contacts
HARRIS CORP6 citations72
INTERSIL CORP
2 patentsUS6441447B1Aug 27, 2002
Co-patterning thin-film resistors of different compositions with a conductive hard mask and method for same
INTERSIL CORP13 citations69
US7605052B2Oct 20, 2009
Method of forming an integrated circuit having a device wafer with a diffused doped backside layer
INTERSIL CORP1 citations62