P

Inventor

CHUA KAR KENG

MY30 patents
⚠️ This page may combine multiple inventors who share the name “CHUA KAR KENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ALTERA CORP

21 patents
US7243329B2Jul 10, 2007

Application-specific integrated circuit equivalents of programmable logic and associated methods

ALTERA CORP20 citations92
US7978493B1Jul 12, 2011

Data encoding scheme to reduce sense current

ALTERA CORP19 citations90
US6599764B1Jul 29, 2003

Isolation testing scheme for multi-die packages

ALTERA CORP18 citations84
US7882408B1Feb 1, 2011

Real time feedback compensation of programmable logic memory

ALTERA CORP7 citations83
US7733121B2Jun 8, 2010

Methods and apparatus for programmably powering down structured application-specific integrated circuits

ALTERA CORP12 citations83
US7246339B2Jul 17, 2007

Methods for creating and expanding libraries of structured ASIC logic and other functions

ALTERA CORP11 citations83
US7243315B2Jul 10, 2007

Methods for producing structured application-specific integrated circuits that are equivalent to field-programmable gate arrays

ALTERA CORP18 citations83
US7164289B1Jan 16, 2007

Real time feedback compensation of programmable logic memory

ALTERA CORP11 citations83
US8037377B1Oct 11, 2011

Techniques for performing built-in self-test of receiver channel having a serializer

ALTERA CORP10 citations82
US8352899B1Jan 8, 2013

Method to modify an integrated circuit (IC) design

ALTERA CORP12 citations78
US7304497B2Dec 4, 2007

Methods and apparatus for programmably powering down structured application-specific integrated circuits

ALTERA CORP7 citations73
US7404169B2Jul 22, 2008

Clock signal networks for structured ASIC devices

ALTERA CORP7 citations70
US7586327B1Sep 8, 2009

Distributed memory circuitry on structured application-specific integrated circuit devices

ALTERA CORP2 citations62
US7071731B1Jul 4, 2006

Programmable Logic with Pipelined Memory Operation

ALTERA CORP3 citations61
US7046566B1May 16, 2006

Voltage-based timing control of memory bit lines

ALTERA CORP5 citations61
US8863061B2Oct 14, 2014

Application-specific integrated circuit equivalents of programmable logic and associated methods

ALTERA CORP2 citations60
US8786308B1Jul 22, 2014

Method and apparatus for providing signal routing control

ALTERA CORP2 citations60
US7870513B2Jan 11, 2011

Application-specific integrated circuit equivalents of programmable logic and associated methods

ALTERA CORP3 citations60
US7363596B1Apr 22, 2008

Methods for storing and naming static library cells for lookup by logic synthesis and the like

ALTERA CORP4 citations58
US9225335B2Dec 29, 2015

Clock signal networks for structured ASIC devices

ALTERA CORP0 citations48
US7683689B1Mar 23, 2010

Delay circuit with delay cells in different orientations

ALTERA CORP0 citations47

CHUA KAR KENG

2 patents

TAN JUN PIN

1 patent

DASTIDAR JAYABRATA GHOSH

1 patent

FOO KOK YOONG

1 patent

SOO SZE HUEY

1 patent

CHOE KOK HENG

1 patent

ANG BOON JIN

1 patent

LIM CHOOI PEI

1 patent