Inventor

DUNN DAVID

US66 patents

⚠️ This page may combine multiple inventors who share the name “DUNN DAVID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DUNN DAVID

TRANSMETA CORP

System and method for identifying TLB entries associated with a physical address of a specified range

System and method for identifying TLB entries associated with a physical address of a specified range

Method and system for enforcing consistent per-physical page cacheability attributes

Supporting speculative modification in a data cache

Method and system for conservatively managing store capacity available to a processor issuing stores

Floating point exception handling in pipelined processor using special instruction to detect generated exception and execute instructions singly from known correct state

Method and apparatus for emulating a floating point stack in a translation process

Method and system for protecting processors from unauthorized debug access

Explicit control of speculation

Exception handling with inserted status check command accommodating floating point instruction forward move across branch

SILGAN CONTAINERS LLC

Can lid

Can lid

Can lid

Can lid

Can lid

Can lid

Can end for pressurized metal food can with shielded vent score

DUNN DAVID

Method and system for providing trusted access to a JTAG scan interface in a microprocessor

Two piece corner framing element for swimming pool extrusions with pool-liner anchor channels

Modifications to increase computer system security

Processor modifications to increase computer system security

Providing trusted access to a JTAG scan interface in a microprocessor

Two piece corner framing element for swimming pool extrusions with pool-liner anchor channels

ROZAS GUILLERMO

System and method for identifying TLB entries associated with a physical address of a specified range

System and method for identifying TLB entries associated with a physical address of a specified range

Supporting speculative modification in a data cache

Method and system for conservatively managing store capacity available to a processor issuing stores

Maintaining instruction coherency in a translation-based computer system architecture

KLAIBER ALEXANDER C

Handling direct memory accesses

System and method for handling direct memory accesses

Data structure for enforcing consistent per-physical page cacheability attributes

DATA GENERAL CORP

Phase-locked loops

Transducer positioning system

JAMESON LLC

Task light

Task light

VMWARE INC

Secure end-to-end deployment of workloads in a virtualized environment using hardware-based attestation

Techniques for protecting memory pages of a virtual computing instance

DISPLAYLINK UK LTD

Method of managing display data

Method of managing display data

ROZAS GUILLERMO J

Checking for exception by floating point instruction reordered across branch by comparing current status in FP status register against last status copied in shadow register

HOLSCHER BRIAN

Systems and methods for reordering processor instructions

MORGAN ANDREW

Method and system for protecting processors from unauthorized debug access

AASTRA TECH LIMITED

Caller ID display device

NVIDIA CORP

Profiling code portions to generate translations

MEMTEC CORP

Home gaussmeter with filter-integrator circuit for measuring elf radiation

SEGELKEN ROSS

Translation address cache for a microprocessor

BRAUCH RUPERT

Instruction-optimizing processor with branch-count table in hardware

VMware LLC

Leveraging hardware-based attestation to grant workloads access to confidential data

ZHU TIMOTHY

Input/output request packet handling techniques by a device specific kernel mode driver

ANVIN H PETER

Explicit control of speculation