Inventor

MATHEW LEO

US64 patents

⚠️ This page may combine multiple inventors who share the name “MATHEW LEO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MATHEW LEO

FREESCALE SEMICONDUCTOR INC

Process of forming a non-volatile memory cell including a capacitor structure

Multiple fin formation

Transistor having three electrically isolated electrodes and method of formation

Method for converting a planar transistor design to a vertical double gate transistor design

Method of forming a transistor having multiple channels

Method for forming a double-gated semiconductor device

Integrated circuit having multiple memory types and method of formation

Transistor having multiple channels

Memory with charge storage locations and adjacent gate structures

Asymmetric spacers and asymmetric source/drain extension layers

Transistor with independent gate structures

Transistor with vertical dielectric structure

Method and circuit for multiplying signals with a transistor having more than one independent gate structure

Semiconductor fabrication process with asymmetrical conductive spacers

Phase change memory cell with heater and method therefor

Integrated circuit using FinFETs and having a static random access memory (SRAM)

Process for forming an electronic device including a fin-type structure

Semiconductor device having conductive spacers in sidewall regions and method for forming

Confined spacers for double gate transistor semiconductor fabrication process

Method of forming a semiconductor device with decreased undercutting of semiconductor material

MIGFET circuit with ESD protection

Twisted dual-substrate orientation (DSO) substrates

Multiple device types including an inverted-T channel transistor and method therefor

Electronic device and a process for forming the electronic device

Semiconductor device having nano-pillars and method therefor

Hybrid-FET and its application as SRAM

Method of forming a finFET and structure

Semiconductor optical devices and method for forming

Semiconductor structure pattern formation

Electronic device including a gated diode

Voltage controlled oscillator with a multiple gate transistor and method therefor

Multiple gate transistor employing monocrystalline silicon walls

Light erasable memory and method therefor

FinFET memory cell having a floating gate and method therefor

Process of forming an electronic device including forming a gate electrode layer and forming a patterned masking layer

Method of forming a semiconductor device having a removable sidewall spacer

Semiconductor optical devices having fin structures

Semiconductor optical devices and method for forming

Split game memory cell method

Semiconductor fabrication process including silicide stringer removal processing

Method of separating a structure in a semiconductor device

Integrated circuit with multiple independent gate field effect transistor (MIGFET) rail clamp circuit

MATHEW LEO

Method of making an inverted-T channel transistor

Phase change memory cell with heater and method therefor

Method of making a phase change memory cell having a silicide heater in conjunction with a FinFET

Method of forming an electronic device using a separation technique

MOTOROLA INC

Vertical MOSFET with asymmetric gate structure

Method of making a power switching trench MOSFET having aligned source regions

ASTROWATT INC

Method of forming an electronic device using a separation-enhancing species

FOSSUM JERRY G

Two-transistor floating-body dynamic memory cell