Inventor

BARREH JAMA I

US17 patents

⚠️ This page may combine multiple inventors who share the name “BARREH JAMA I”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BARREH JAMA I

SUN MICROSYSTEMS INC

Handling duplicate cache misses in a multithreaded/multi-core processor

Fetch speculation in a multithreaded processor

Cache error handling in a multithreaded/multi-core processor

Concurrent bypass to instruction buffers in a fine grain multithreaded processor

Minimal address state in a fine grain multithreaded processor

GOLLA ROBERT T

Logical map table for detecting dependency conditions between instructions having varying width operand values

Hybrid instruction buffer

Processor operating mode for mitigating dependency conditions between instructions having different operand sizes

ORACLE AMERICA INC

Arbitrating cache misses in a multithreaded/multi-core processor

Delay slot handling in a processor

SHAH MANISH K

Perceptron-based branch prediction mechanism for predicting conditional branch instructions on a multithreaded processor

Miss buffer for a multi-threaded processor

OLSON CHRISTOPHER H

Processor and method providing instruction support for instructions that utilize multiple register windows

JORDAN PAUL J

Dynamic tag allocation in a multithreaded out-of-order processor

WESTERN DIGITAL TECH INC

Cache diagnostic techniques

ORACLE INT CORP

Multi-threaded instruction buffer design

BARREH JAMA I

Multi-threaded instruction buffer design