Inventor
HERRENSCHMIDT BENJAMIN
AU21 patents
⚠️ This page may combine multiple inventors who share the name “HERRENSCHMIDT BENJAMIN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
17 patentsUS9317443B2Apr 19, 2016
Managing translations across multiple contexts using a TLB with entries directed to multiple privilege levels and to multiple types of address spaces
IBM17 citations92
US8364933B2Jan 29, 2013
Software assisted translation lookaside buffer search mechanism
IBM31 citations90
US10387686B2Aug 20, 2019
Hardware based isolation for secure execution of virtual machines
IBM11 citations84
US9323692B2Apr 26, 2016
Managing translation of a same address across multiple contexts using a same entry in a translation lookaside buffer
IBM15 citations84
US10817434B2Oct 27, 2020
Interruptible translation entry invalidation in a multithreaded data processing system
IBM3 citations73
US9330023B2May 3, 2016
Managing translations across multiple contexts using a TLB with entries directed to multiple privilege levels and to multiple types of address spaces
IBM4 citations73
US9417846B1Aug 16, 2016
Techniques for improving random number generation security
IBM4 citations71
US9251088B2Feb 2, 2016
Mechanisms for eliminating a race condition between a hypervisor-performed emulation process requiring a translation operation and a concurrent translation table entry invalidation
IBM2 citations63
US11226902B2Jan 18, 2022
Translation load instruction with access protection
IBM1 citations62
US10255194B2Apr 9, 2019
Configurable I/O address translation data structure
IBM0 citations52
US10241923B2Mar 26, 2019
Configurable I/O address translation data structure
IBM0 citations52
US9311249B2Apr 12, 2016
Managing translation of a same address across multiple contexts using a same entry in a translation lookaside buffer
IBM1 citations52
US11461474B2Oct 4, 2022
Process-based virtualization system for executing a secure application process
IBM0 citations51
US9575728B1Feb 21, 2017
Random number generation security
IBM1 citations51
US11755362B2Sep 12, 2023
Techniques for handling escalation of interrupts in a data processing system
IBM0 citations50
US11221957B2Jan 11, 2022
Promotion of ERAT cache entries
IBM0 citations50
US10776281B2Sep 15, 2020
Snoop invalidate filter for distributed memory management unit to reduce snoop invalidate latency
IBM0 citations33
FRANKE HUBERTUS
2 patentsUS8688953B2Apr 1, 2014
Method and apparatus for managing software controlled cache of translating the physical memory access of a virtual machine between different levels of translation entities
FRANKE HUBERTUS8 citations83
US8275971B2Sep 25, 2012
Method and apparatus for managing software controlled cache of translating the physical memory access of a virtual machine between different levels of translation entities
FRANKE HUBERTUS8 citations83