Inventor

LEE HAE-CHANG

US78 patents

⚠️ This page may combine multiple inventors who share the name “LEE HAE-CHANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LEE HAE-CHANG

RAMBUS INC

Methods and circuits for asymmetric distribution of channel equalization between devices

Methods and circuits for asymmetric distribution of channel equalization between devices

Receiver with enhanced clock and data recovery

Methods and circuits for asymmetric distribution of channel equalization between devices

High-speed signaling systems and methods with adaptable, continuous-time equalization

Apparatus and method for controllably injecting jitter into recovered clock to simulate presence of jitter in input signal

Edge based partial response equalization

Methods and circuits for asymmetric distribution of channel equalization between devices

High-speed signaling systems and methods with adaptable, continuous-time equalization

Receiver with clock recovery circuit and adaptive sample and equalizer timing

Methods and circuits for asymmetric distribution of channel equalization between devices

Receiver with enhanced clock and data recovery

High-speed signaling systems and methods with adaptable, continuous-time equalization

Methods and circuits for asymmetric distribution of channel equalization between devices

Clock and data recovery using receiver clock spread spectrum modulation and offset compensation

Integrated circuit having receiver jitter tolerance (“JTOL”) measurement

Edge based partial response equalization

Receiver with clock recovery circuit and adaptive sample and equalizer timing

Receiver with enhanced clock and data recovery

Edge based partial response equalization

Receiver with clock recovery circuit and adaptive sample and equalizer timing

Phase control block for managing multiple clock domains in systems with frequency offsets

Receiver with enhanced clock and data recovery

Receiver with enhanced clock and data recovery

Integrated circuit having receiver jitter tolerance (“JTOL”) measurement

Methods and circuits for asymmetric distribution of channel equalization between devices

Methods and circuits for asymmetric distribution of channel equalization between devices

Clock and data recovery using receiver clock spread spectrum modulation and offset compensation

Clock and data recovery using receiver clock spread spectrum modulation and offset compensation

Receiver with clock recovery circuit and adaptive sample and equalizer timing

Interface with variable data rate

Interface with variable data rate

Edge based partial response equalization

High-speed signaling systems and methods with adaptable, continuous-time equalization

Interface with variable data rate

LEE HAE-CHANG

Receiver with enhanced clock and data recovery

Integrated circuit having receiver jitter tolerance (“JTOL”) measurement

Phase control block for managing multiple clock domains in systems with frequency offsets

Clock and data recovery employing piece-wise estimation on the derivative of the frequency

Integrated circuit having receiver jitter tolerance (“JTOL”) measurement

Phase control block for managing multiple clock domains in systems with frequency offsets

LIN QI

Signaling with superimposed differential-mode and common-mode signals

Receiver with clock recovery circuit and adaptive sample and equalizer timing

LEIBOWITZ BRIAN S

Apparatus and methods for differential signal receiving

Partial response decision-feedback equalization with adaptation based on edge samples

ZERBE JARED L

Methods and circuits for asymmetric distribution of channel equalization between devices

ALTERA CORP

Systems and methods for reducing power supply noise or jitter

ARYANFAR FARSHID

Signal distribution networks and related methods

SILICON IMAGE INC

Signal distribution networks and related methods

FRANS YOHAN U

Interface with variable data rate