Inventor

REN JIHONG

US43 patents

⚠️ This page may combine multiple inventors who share the name “REN JIHONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

REN JIHONG

RAMBUS INC

Methods and circuits for asymmetric distribution of channel equalization between devices

Methods and circuits for asymmetric distribution of channel equalization between devices

Clock and data recovery having shared clock generator

Methods and circuits for asymmetric distribution of channel equalization between devices

Method and apparatus for source-synchronous signaling

Clock and data recovery having shared clock generator

Edge based partial response equalization

Methods and circuits for asymmetric distribution of channel equalization between devices

Method and apparatus for source-synchronous signaling

Receiver with clock recovery circuit and adaptive sample and equalizer timing

Methods and circuits for asymmetric distribution of channel equalization between devices

Methods and circuits for asymmetric distribution of channel equalization between devices

Methods and circuits for reducing clock jitter

Edge based partial response equalization

Receiver with clock recovery circuit and adaptive sample and equalizer timing

Edge based partial response equalization

Method and apparatus for source-synchronous signaling

Method and apparatus for source-synchronous signaling

Receiver with clock recovery circuit and adaptive sample and equalizer timing

Clock and data recovery having shared clock generator

Methods and circuits for asymmetric distribution of channel equalization between devices

Methods and circuits for asymmetric distribution of channel equalization between devices

Receiver with clock recovery circuit and adaptive sample and equalizer timing

Edge based partial response equalization

Edge based partial response equalization

Edge based partial response equalization

LIN QI

Signaling with superimposed differential-mode and common-mode signals

Receiver with clock recovery circuit and adaptive sample and equalizer timing

Signaling with superimposed clock and data signals

ALTERA CORP

Integrated circuit with continuously adaptive equalization circuitry

Phase detection in an analog clock data recovery circuit with decision feedback equalization

ZERBE JARED L

Method and apparatus for source-synchronous signaling

Methods and circuits for asymmetric distribution of channel equalization between devices

INTEL CORP

Calibration for mismatch in receiver circuitry with multiple samplers

Adjusting a continuous time linear equalization-based receiver

OH KYUNG SUK

Frequency responsive bus coding

HOSSAIN MASUM

Clock and data recovery having shared clock generator

LEIBOWITZ BRIAN S

Partial response decision-feedback equalization with adaptation based on edge samples

ZERBE JARED

Methods and circuits for reducing clock jitter

SILICON IMAGE INC

High-accuracy detection in collaborative tracking systems

XINJIANG YOUMIAO ENVIRONMENTAL PROTECTION TECH CO LTD

Graphitic carbon-doped and mixed crystal-type titanium dioxide nanotube composite for electrocatalysis, and preparation method and use thereof

ARYANFAR FARSHID

Calibrating a retro-directive array for an asymmetric wireless link

KIM JAEHA

Stochastic steady state circuit analyses