Inventor

ARCHAMBAULT ROCH GEORGES

CA17 patents

⚠️ This page may combine multiple inventors who share the name “ARCHAMBAULT ROCH GEORGES”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ARCHAMBAULT ROCH GEORGES

IBM

Loop allocation for optimizing compilers

Aggregate bandwidth through management using insertion of reset instructions for cache-to-cache data transfer

Fine-grained software-directed data prefetching using integrated high-level and low-level code analysis optimizations

Method and apparatus for improving data cache performance using inter-procedural strength reduction of global objects

Interprocedural dead store elimination

Method and system for reducing memory reference overhead associated with threadprivate variables in parallel programs

Optimizing source code for iterative execution

Optimal cache replacement scheme using a training operation

Method and system for reducing memory reference overhead associated with treadprivate variables in parallel programs

Method for optimizing software program using inter-procedural strength reduction

Method and apparatus for determining the profitability of expanding unpipelined instructions

Method and system for code modification based on cache structure

ARCHAMBAULT ROCH GEORGES

Compiling source code

Procedure control descriptor-based code specialization for context sensitive memory disambiguation

Method and apparatus for optimizing software program using inter-procedural strength reduction

Sparse vectorization without hardware gather/scatter

Code generation for complex arithmetic reduction for architectures lacking cross data-path support