Inventor
TSAI CHAO-JIE
TW3 patents
Patents
3 patentsUS6368928B1Apr 9, 2002
Method of forming an indium retrograde profile via use of a low temperature anneal procedure to reduce NMOS short channel effects
TAIWAN SEMICONDUCTOR MFG33 citations89
US6875705B2Apr 5, 2005
Method of high selectivity wet etching of salicides
TAIWAN SEMICONDUCTOR MFG4 citations59
US6605812B1Aug 12, 2003
Method reducing the effects of N2 gas contamination in an ion implanter
TAIWAN SEMICONDUCTOR MFG0 citations47