Inventor

DUBROVIN LEONID

IL21 patents

⚠️ This page may combine multiple inventors who share the name “DUBROVIN LEONID”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

DUBROVIN LEONID

RABINOVITCH ALEXANDER

Cache replacement using active cache line counters

Branch target buffer with entry source field for use in determining replacement priority

Efficient extraction of execution sets from fetch sets

Copying data to a cache using direct memory access

On-demand allocation of cache memory for use as a preset buffer

Biquad infinite impulse response system transformation

Intra-prediction mode selection while encoding a picture

DUBROVIN LEONID

Method and apparatus for caching prefetched data

Cache prefetch learning

Implementation of negation in a multiplication operation without post-incrementation

Fully asynchronous direct memory access controller and processor work

Orthogonal variable spreading factor code sequence generation

Avoiding stall in processor pipeline upon read after write resource conflict when intervening write present

Method and apparatus to perform floating point operations

ALEXANDRON NIMROD

Low access time indirect memory accesses

Sequentially packing mask selected bits from plural words in circularly coupled register pair for transferring filled register bits to memory

Controller and method for statistical allocation of multichannel direct memory access bandwidth

Representation of data relative to varying thresholds

AMITAY AMICHAY

Adjusting direct memory access transfers used in video decoding

Cache prefetch during motion estimation

Multi-destination direct memory access transfer