Inventor

MARIMUTHU PANDI C

SG65 patents

⚠️ This page may combine multiple inventors who share the name “MARIMUTHU PANDI C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MARIMUTHU PANDI C

STATS CHIPPAC LTD

Semiconductor device and method of forming an interconnect structure for 3-D devices using encapsulant for structural support

Semiconductor device having wire studs as vertical interconnect in FO-WLP

Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units

Semiconductor device and method of forming a PoP device with embedded vertical interconnect units

Semiconductor device and method of forming compliant polymer layer between UBM and conformal dielectric layer/RDL for stress relief

Semiconductor device and method of forming double-sided fan-out wafer level package

Semiconductor method and device of forming a fan-out PoP device with PWB vertical interconnect units

Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits

Semiconductor device and method of forming fine pitch RDL over semiconductor die in fan-out package

Semiconductor device and method of forming embedded wafer level chip scale packages

Semiconductor device and method of forming low profile fan-out package with vertical interconnection units

Semiconductor device and method for forming openings and trenches in insulating layer by first LDA and second LDA for RDL formation

Semiconductor device and method for forming a low profile embedded wafer level ball grid array molded laser package (EWLP-MLP)

Semiconductor device and method of forming thermal lid for balancing warpage and thermal management

Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure

Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure

Semiconductor device and method of depositing encapsulant along sides and surface edge of semiconductor die in embedded WLCSP

Semiconductor device and method of bonding semiconductor die to substrate in reconstituted wafer form

Semiconductor device and method of making TSV interconnect structures using encapsulant for structural support

Semiconductor device and method of using a standardized carrier in semiconductor packaging

Semiconductor device and method of simultaneous molding and thermalcompression bonding

Double-sided semiconductor package and dual-mold method of making same

Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief

Semiconductor device and method of reducing warpage using a silicon to encapsulant ratio

Semiconductor device and method of bonding semiconductor die to substrate in reconstituted wafer form

Semiconductor device and method of using substrate having base and conductive posts to form vertical interconnect structure in embedded die package

Semiconductor device and method of making bumpless flipchip interconnect structures

Semiconductor device and method of forming conductive vias by backside via reveal with CMP

Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages

Semiconductor device and method of forming a thin wafer without a carrier

Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor die

STATS CHIPPAC PTE LTD

Semiconductor device and method of forming electromagnetic (EM) shielding for LC circuits

Semiconductor device and method of forming low profile fan-out package with vertical interconnection units

Semiconductor device and method of forming a thin wafer without a carrier

Semiconductor device and method of forming wire studs as vertical interconnect in FO-WLP

Semiconductor device and method of forming embedded wafer level chip scale packages

Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units

Semiconductor device and method of forming embedded wafer level chip scale packages

Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units

Semiconductor device and method of forming a PoP device with embedded vertical interconnect units

Semiconductor device with encapsulant deposited along sides and surface edge of semiconductor die in embedded WLCSP

Method of depositing encapsulant along sides and surface edge of semiconductor die in embedded WLCSP

Semiconductor device and method of forming embedded wafer level chip scale packages

Semiconductor device and method of using a standardized carrier to form embedded wafer level chip scale packages

SUTHIWONGSUNTHORN NATHAPONG

Semiconductor device having an interconnect structure with TSV using encapsulant for structural support

Semiconductor device and method of forming an interconnect structure with TSV using encapsulant for structural support

KOO JUN MO

Semiconductor device and method of bonding different size semiconductor die at the wafer level

LIN YAOJIAN

Semiconductor device and method of forming insulating layer disposed over the semiconductor die for stress relief

PAGAILA REZA A

Semiconductor device and method of forming discontinuous ESD protection layers between semiconductor die

MARIMUTHU PANDI C

Semiconductor device and method of forming a thin wafer without a carrier