P

Inventor

HALL JONATHAN C

US29 patents
⚠️ This page may combine multiple inventors who share the name “HALL JONATHAN C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

19 patents
US9348601B2May 24, 2016

Coalescing adjacent gather/scatter operations

INTEL CORP14 citations92
US10133577B2Nov 20, 2018

Vector mask driven clock gating for power efficiency of a processor

INTEL CORP8 citations84
US9658856B2May 23, 2017

Coalescing adjacent gather/scatter operations

INTEL CORP3 citations84
US9645826B2May 9, 2017

Coalescing adjacent gather/scatter operations

INTEL CORP3 citations84
US9632792B2Apr 25, 2017

Coalescing adjacent gather/scatter operations

INTEL CORP4 citations84
US9626193B2Apr 18, 2017

Coalescing adjacent gather/scatter operations

INTEL CORP3 citations84
US9626192B2Apr 18, 2017

Coalescing adjacent gather/scatter operations

INTEL CORP4 citations84
US9612842B2Apr 4, 2017

Coalescing adjacent gather/scatter operations

INTEL CORP3 citations84
US9575765B2Feb 21, 2017

Coalescing adjacent gather/scatter operations

INTEL CORP6 citations84
US9563429B2Feb 7, 2017

Coalescing adjacent gather/scatter operations

INTEL CORP3 citations84
US10007620B2Jun 26, 2018

System and method for cache replacement using conservative set dueling

INTEL CORP2 citations71
US12360774B2Jul 15, 2025

Coalescing adjacent gather/scatter operations

INTEL CORP0 citations62
US11599362B2Mar 7, 2023

Coalescing adjacent gather/scatter operations

INTEL CORP0 citations62
US11003455B2May 11, 2021

Coalescing adjacent gather/scatter operations

INTEL CORP0 citations62
US10275257B2Apr 30, 2019

Coalescing adjacent gather/scatter operations

INTEL CORP0 citations52
US10175990B2Jan 8, 2019

Gathering and scattering multiple data elements

INTEL CORP0 citations51
US9715432B2Jul 25, 2017

Memory fault suppression via re-execution and hardware FSM

INTEL CORP1 citations50
US9842046B2Dec 12, 2017

Processing memory access instructions that have duplicate memory indices

INTEL CORP0 citations41
US9804842B2Oct 31, 2017

Method and apparatus for efficiently managing architectural register state of a processor

INTEL CORP0 citations38

TOYOTA ENG & MFG NORTH AMERICA

6 patents

HUGHES CHRISTOPHER J

3 patents

HALL JONATHAN C

1 patent