Inventor
NALLA RAVI K
US19 patents
⚠️ This page may combine multiple inventors who share the name “NALLA RAVI K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NALLA RAVI K
8 patentsUS8304913B2Nov 6, 2012
Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby
NALLA RAVI K46 citations97
US8319318B2Nov 27, 2012
Forming metal filled die back-side film for electromagnetic interference shielding with coreless packages
NALLA RAVI K42 citations94
US8431438B2Apr 30, 2013
Forming in-situ micro-feature structures with coreless packages
NALLA RAVI K17 citations92
US8618652B2Dec 31, 2013
Forming functionalized carrier structures with coreless packages
NALLA RAVI K30 citations91
US8580616B2Nov 12, 2013
Methods of forming fully embedded bumpless build-up layer packages and structures formed thereby
NALLA RAVI K8 citations83
US8507324B2Aug 13, 2013
Forming metal filled die back-side film for electromagnetic interference shielding with coreless packages
NALLA RAVI K2 citations61
US8896116B2Nov 25, 2014
Microelectronic package and method of manufacturing same
NALLA RAVI K0 citations51
US8183692B2May 22, 2012
Barrier layer for fine-pitch mask-based substrate bumping
NALLA RAVI K0 citations50
INTEL CORP
7 patentsUS9780054B2Oct 3, 2017
Semiconductor package with embedded die and its methods of fabrication
INTEL CORP2 citations72
US7776734B2Aug 17, 2010
Barrier layer for fine-pitch mask-based substrate bumping
INTEL CORP3 citations61
US7494913B2Feb 24, 2009
Microball placement solutions
INTEL CORP5 citations57
US9214439B2Dec 15, 2015
Forming in-situ micro-feature structures with coreless packages
INTEL CORP0 citations52
US9257380B2Feb 9, 2016
Forming functionalized carrier structures with coreless packages
INTEL CORP0 citations51
US8809124B2Aug 19, 2014
Bumpless build-up layer and laminated core hybrid structures and methods of assembling same
INTEL CORP0 citations51
US9406618B2Aug 2, 2016
Die-stacking using through-silicon vias on bumpless build-up layer substrates including embedded-dice, and processes of forming same
INTEL CORP0 citations46