Inventor

CRANFORD JR HAYDEN C

US107 patents

⚠️ This page may combine multiple inventors who share the name “CRANFORD JR HAYDEN C”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CRANFORD JR HAYDEN C

IBM

Method and apparatus for controlling common-mode output voltage in fully differential amplifiers

Low voltage CMOS circuit for on/off chip drive at high voltage

System and method for balancing delay of signal communication paths through well voltage adjustment

On-chip electromigration monitoring system

Power network reconfiguration using MEM switches

On chip multiple voltage generation using a charge pump and plural feedback sense circuits

Design structures, method and systems of powering on integrated circuit

Method for determining jitter of a signal in a serial link and high speed serial link

Receiver for clock and data recovery and method for calibrating sampling phases in a receiver for clock and data recovery

Charge pump system for non-volatile ram

Electrically alterable read only memory cell

Self series terminated serial link transmitter having segmentation for amplitude, pre-emphasis, and slew rate control and voltage regulation for amplitude accuracy and high voltage protection

Terminating resistor driver for high speed data communication

Method and system for configuring terminators in a serial communication system

System and method for manufacturing test of a physical layer transceiver

Systems and methods for signal detection

Systems and arrangements for clock and data recovery in communications

Structure for intrinsic RC power distribution for noise filtering of analog supplies

Systems and arrangements for clock and data recovery in communications

On-chip electromigration monitoring

Method for on-chip diagnostic testing and checking of receiver margins

Design structures of powering on integrated circuit

Generating an eye diagram of integrated circuit transmitted signals

Body-biased enhanced precision current mirror

Design structure for a flexible multimode logic element for use in a configurable mixed-logic signal distribution path

Driver/equalizer with compensation for equalization non-idealities

CML delay cell with linear rail-to-rail tuning range and constant output swing

Flexible multimode logic element for use in a configurable mixed-logic signal distribution path

Flexible multimode logic element for use in a configurable mixed-logic signal distribution path

Method and apparatus for determining jitter and pulse width from clock signal comparisons

Transistor switch with integral body connection to prevent latchup

Circuit and method for reducing jitter in a PLL of high speed serial links

Programmable driver/equalizer with alterable analog finite impulse response (FIR) filter having low intersymbol interference and constant peak amplitude independent of coefficient settings

Impedance calibration for source series terminated serial link transmitter

Impedance calibration for source series terminated serial link transmitter

Nodal charge compensation for SST driver having data mux in output stage

One-sample-per-bit decision feedback equalizer (DFE) clock and data recovery

Adjustment of PLL bandwidth for jitter control using feedback circuitry

Bias circuit for a MOS device

Structure for on-chip electromigration monitoring system

Design structure for a flexible multimode logic element for use in a configurable mixed-logic signal distribution path

Structure and method for providing precision passive elements

Structure and method for providing gate leakage isolation locally within analog circuits

High voltage on chip FET driver

Systems for signal detection

Equalizer for reduced intersymbol interference via partial clock switching

ARSOVSKI IGOR

Environmental and computing cost reduction with improved reliability in workload assignment to distributed computing nodes

Adaptive noise suppression using a noise look-up table

GLOBALFOUNDRIES INC

Control of VCSEL-based optical communications system

CHEN MINHAN

Serial link receiver for handling high speed transmissions