Inventor

SHIEH JYU-HORNG

TW125 patents

⚠️ This page may combine multiple inventors who share the name “SHIEH JYU-HORNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SHIEH JYU-HORNG

TAIWAN SEMICONDUCTOR MFG CO LTD

Multi-patterning method and device formed by the method

Memory device and fabrication method thereof

Air gap structure and method

Organosilicate polymer mandrel for self-aligned double patterning process

Double patterning method

Metal etching stop layer in magnetic tunnel junction memory cells

Semiconductor structure and manufacturing method of the same

Interconnect structure and method of forming the same

Memory device and fabrication method thereof

Double patterning method

Double patterning method

Contact plug without seam hole and methods of forming the same

Interconnect structure and method of forming the same

Contact plug without seam hole and methods of forming the same

Interconnect structure and method of forming the same

Double patterning method

Semiconductor device with self aligned end-to-end conductive line structure and method for forming the same

Self-aligned double patterning

Gradient protection layer in MTJ manufacturing

Integrated circuit structure

Semiconductor structure and manufacturing method of the same

Gradient protection layer in MTJ manufacturing

Method of forming a semiconductor device

Gradient protection layer in MTJ manufacturing

Interconnect structure and method of forming the same

Semiconductor device having air gap structures and method of fabricating thereof

Structure of dual damascene structures having via hole and trench

Method and apparatus for back end of line semiconductor device processing

Interconnect structure and method of forming same

Semiconductor device having air gap structures and method of fabricating thereof

Semiconductor device having air gap structures and method of fabricating thereof

DC bias in plasma process

Dry ashing by secondary excitation

Method of preventing pattern collapse

TAIWAN SEMICONDUCTOR MFG

Spacer etching process for integrated circuit design

Method for preventing photoresist poisoning

Wet cleaning stripping of etch residue after trench and via opening formation in dual damascene process

Air gap interconnect structure and method thereof

Dual damascene structure formed of low-k dielectric materials

Process for improving copper fill integrity

Photo resist trimmed line end space

Semiconductor device with self aligned end-to-end conductive line structure and method of forming the same

Dual damascene process

Resistance-reduced semiconductor device and methods for fabricating the same

Process for improving dielectric properties in low-k organosilicate dielectric material

Method of preventing a pattern collapse

Edge defect inhibited trench etch plasma etch method

Method of forming silicided gate structure

Dual damascene process

Low oxygen content photoresist stripping process for low dielectric constant materials