Inventor

TUCH HARVEY

US35 patents

⚠️ This page may combine multiple inventors who share the name “TUCH HARVEY”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

TUCH HARVEY

VMWARE INC

Hypervisor context switching using a redirection exception vector in processors having more than two hierarchical privilege levels

Hypervisor context switching using TLB tags in processors having more than two hierarchical privilege levels

Secure inter-process communication and virtual workspaces on a mobile device

Implementing upcall from secure to non-secure mode by injecting exception into non-secure mode

Method and system to impose enterprise security mechanisms throughout a mobile application lifecycle

Partitioning a hypervisor into virtual hypervisors

Secondary CPU MMU initialization using page fault exception

Remote provisioning of hosts in public clouds

Configuration profile validation on iOS Using SSL and redirect

Remote provisioning of hosts in public clouds

Remote provisioning of hosts in public clouds

Implementing per-processor memory areas with non-preemptible operations using virtual aliases

Implementing per-processor memory areas with non-preemptible operations using virtual aliases

Hypervisor backdoor interface

Hypervisor context switching using a trampoline scheme in processors having more than two hierarchical privilege levels

Safely discovering secure monitors and hypervisor implementations in systems operable at multiple hierarchical privilege levels

Exposing memory-mapped IO devices to drivers through firmware

Virtualizing processor memory protection with “L1 iterate and L2 drop/repopulate”

Implementing pseudo non-masking interrupts behavior using a priority interrupt controller

Configuration profile validation on IOS using SSL and redirect

Configuration profile validation on iOS based on root certificate validation

Device simulation in a secure mode supported by hardware architectures

Creating a communication channel between different privilege levels using wait-for-event instruction in systems operable at multiple levels hierarchical privilege levels

Multiprocessor initialization via firmware configuration

Exposing memory-mapped IO devices to drivers by emulating PCI bus and PCI device configuration space

Implementing pseudo non-masking interrupts behavior using a priority interrupt controller

TUCH HARVEY

Memory defragmentation in a hosted hypervisor

Virtualizing processor memory protection with “domain track”

Dynamically balancing memory resources between host and guest system based on relative amount of freeable memory and amount of memory allocated to hidden applications

Controlling access to a privileged resource in user-mode system level mobile virtualization using a ptrace () system call

Cooperative memory resource management for virtualized computing devices

Virtualizing processor memory protection with “L1 iterate and L2 drop/repopulate”

Virtualizing processor memory protection with “L1 iterate and L2 swizzle”

NEWELL CRAIG

Storage ballooning in a mobile computing device

LAPLACE CYPRIEN

Block storage virtualization on commodity secure digital cards