Inventor

JENG NANSENG

US53 patents

⚠️ This page may combine multiple inventors who share the name “JENG NANSENG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JENG NANSENG

MICRON TECHNOLOGY INC

Method for reducing photolithographic steps in a semiconductor interconnect process

Barrier in gate stack for improved gate dielectric integrity

Barrier in gate stack for improved gate dielectric integrity

Thermal trench isolation

Barrier in gate stack for improved gate dielectric integrity

Barrier in gate stack for improved gate dielectric integrity

Method for optimizing printing of a phase shift mask having a phase shift error

Method for reducing photolithographic steps in a semiconductor interconnect process

Method of reducing stress-induced defects in silicon

Process for doping hemispherical grain silicon

Low-stress method of fabricating field-effect transistors having silicon nitride spacers on gate electrode edges

Method for reducing oxide thinning during the formation of a semiconductor device

Semiconductor processing method of forming an electrically conductive contact plug

Method of forming a field effect transistor

Semiconductor processing method of forming an electrically conductive contact plug

Semiconductor processing methods of forming field oxidation regions on a semiconductor substrate

Semiconductor processing method of forming field oxide regions on a semiconductor substrate utilizing a laterally outward projecting foot portion

Method of trench isolation during the formation of a semiconductor device

Method for forming a spacer for semiconductor manufacture

Process to improve the flow of oxide during field oxidation by fluorine doping

Method for forming a spacer using photosensitive material

Method for forming a spacer out of photosensitive material

Method of forming a LOCOS trench isolation structure

Well-drive anneal technique using preplacement of nitride films for enhanced field isolation

Method for forming field oxide or other insulators during the formation of a semiconductor device

Semiconductor processing method of forming an electrically conductive contact plug

Process to improve the flow of oxide during field oxidation by fluorine doping

Field oxide formation by oxidation of polysilicon layer

Texturized polycrystalline silicon to aid field oxide formation

Contact-substrate for a semiconductor device comprising a contour

Method for forming field oxide having uniform thickness

Method for forming field oxide or other insulators during the formation of a semiconductor device

Current leakage reduction at the storage node diffusion region of a stacked-trench dram cell by selectively oxidizing the floor of the trench

Method for optimizing printing of an alternating phase shift mask having a phase shift error

Streamlined field isolation process

Isolation structure having trench structures formed on both side of a locos

Method for forming a spacer for semiconductor manufacture

Semiconductor processing method of forming an electrically conductive contact plug

Method for reducing photolithographic steps in a semiconductor interconnect process

Assisted local oxidation of silicon

Method for forming a semiconductor device contact structure comprising a contour

Method of forming a field effect transistor

Locus isolation technique using high pressure oxidation (hipox) and protective spacers

Semiconductor processing methods of forming field oxidation regions on a semiconductor substrate

Intermediate structure having a silicon barrier layer encapsulating a semiconductor substrate

MICRON SEMICONDUCTOR INC

Method of forming a contact using a trench and an insulation layer during the formation of a semiconductor device

Method of semiconductor device isolation employing polysilicon layer for field oxide formation

Current leakage reduction at the storage node diffusion region of a stacked-trench DRAM cell by selectively oxidizing the floor of the trench

MICROM TECHNOLOGY INC

Texturized polycrystalline silicon to aid field oxide formation

(unassigned)

Method for reducing photolithographic steps in a semiconductor interconnect process