Inventor
CHADALAVDA SAILENDRA
US4 patents
Patents
4 patentsUS10281524B2May 7, 2019
Test partition external input/output interface control for test partitions in a semiconductor
NVIDIA CORP6 citations82
US10317463B2Jun 11, 2019
Scan system interface (SSI) module
NVIDIA CORP6 citations80
US10444280B2Oct 15, 2019
Independent test partition clock coordination across multiple test partitions
NVIDIA CORP2 citations69
US10451676B2Oct 22, 2019
Method and system for dynamic standard test access (DSTA) for a logic block reuse
NVIDIA CORP0 citations45