Inventor

SU HUNG-WEN

TW97 patents

⚠️ This page may combine multiple inventors who share the name “SU HUNG-WEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SU HUNG-WEN

TAIWAN SEMICONDUCTOR MFG CO LTD

Semiconductor device having interconnect layer that includes dielectric segments interleaved with metal components

Method of forming an interconnect structure having an air gap and structure thereof

Multi-layer film device and method

Multi-layer film device and method

Method of forming an interconnect structure

Multi-layer film device and method

Interconnect structure including a conductive feature and a barrier layer on sidewalls and a bottom surface of the conductive feature and method of forming the same

Interconnect structure having air gap and method of forming the same

Method of forming an interconnect structure having an air gap and structure thereof

Method of forming hybrid diffusion barrier layer and semiconductor device thereof

Selective capping processes and structures formed thereby

Selective capping processes and structures formed thereby

Chemical direct pattern plating method

Electro-plating and apparatus for performing the same

Method of forming an interconnect structure having a carbon-containing barrier layer

Semiconductor device having interconnect layer that includes dielectric segments interleaved with metal components

Method of forming an interconnect structure having an air gap and structure thereof

Physical vapor deposition system and physical vapor depositing method using the same

Electro-plating and apparatus for performing the same

Diffusion barrier for semiconductor device and method

Selective capping processes and structures formed thereby

Metal cap apparatus and method

Interconnect structure and method of forming thereof

Physical vapor deposition process for semiconductor interconnection structures

Physical vapor deposition process for semiconductor interconnection structures

Physical vapor deposition process for semiconductor interconnection structures

Systems and methods of compensating for filling material losses in electroplating processes

Multi-layer film device and method

Chemical direct pattern plating method

Method of forming an interconnect structure having an air gap and structure thereof

Interconnect structure having a carbon-containing barrier layer

Semiconductor device, method and machine of manufacture

Selective capping processes and structures formed thereby

Multi-layer film device and method

Interconnect structure of semiconductor device

Interconnect structure having a carbon-containing barrier layer

TAIWAN SEMICONDUCTOR MFG

Copper interconnection with conductive polymer layer and method of forming the same

Semiconductor device and fabrication method thereof

Damascene interconnect structure with cap layer

Interconnect structure having air gap and method of forming the same

Method and apparatus for electroplating

Method of forming a robust copper interconnect by dilute metal doping

Method for reducing surface defects in an electrodeposition process

Method of forming a copper layer using physical vapor deposition

Stress-controlled formation of tin hard mask

Semiconductor device and method for forming the same

LEE YA-LIEN

Device for reducing contact resistance of a metal

CHEN CHIEN-AN

Mechanisms of forming damascene interconnect structures

LIN CHUN CHIEH

Gap filling method for dual damascene process

UNIV NAT TAIWAN

Polyimide-titania hybrid materials, their preparation, and film prepared from the materials