Inventor

WEISSMANN ELIEZER

IL163 patents

⚠️ This page may combine multiple inventors who share the name “WEISSMANN ELIEZER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WEISSMANN ELIEZER

INTEL CORP

Power management coordination in multi-core processors

Coordinating idle state transitions in multi-core processors

Dynamically allocating a power budget over multiple domains of a processor

Apparatus and method for low-latency invocation of accelerators

PCI express enhancements and extensions

PCI express enhancements and extensions

Enabling a non-core domain to control memory bandwidth in a processor

System, apparatus and method for loose lock-step redundancy power management

Multi-level loops for computer processor control

Apparatus and method for low-latency invocation of accelerators

Dynamically controlling cache size to maximize energy efficiency

Controlling a guaranteed frequency of a processor

Atomic operations in PCI express

Dynamically controlling cache size to maximize energy efficiency

Mapping a performance request to an operating frequency in a processor

Techniques and system for managing platform temperature

PCI express transaction descriptor

Transaction re-ordering

Prefectching in PCI express

Controlling performance states of processing engines of a processor

Controlling forced idle state operation in a processor

Linear to physical address translation with support for page attributes

Apparatus and method for accelerating operations in a processor which uses shared virtual memory

Apparatuses, methods, and systems for instructions to request a history reset of a processor core

Multi-level CPU high current protection

Apparatuses, methods, and systems for instructions to request a history reset of a processor core

Multi-level loops for computer processor control

Apparatuses, methods, and systems for instructions to request a history reset of a processor core

Collaborative processor and system performance and power management

AJANOVIC JASMIN

PCI express enhancements and extensions

PCI express enhancements and extensions

PCI express enhancements and extensions

PCI express enhancements and extensions including device window caching

PCI express enhancements and extensions

PCI express enhancements and extensions

PCI express enhancements and extensions including transactions having prefetch parameters

PCI express enhancements and extensions

Atomic operations

ANANTHAKRISHNAN AVINASH N

Dynamically controlling cache size to maximize energy efficiency

Dynamically allocating a power budget over multiple domains of a processor

ROTEM EFRAIM

Controlling current transients in a processor

Method and apparatus of power management of processor

THERIEN GUY M

Collaborative processor and system performance and power management

Collaborative processor and system performance and power management

GINZBURG BORIS

Context switching mechanism for a processing core having a general purpose CPU core and a tightly coupled accelerator

Providing an asymmetric multicore processor system transparently to an operating system

NAVEH ALON

Method, apparatus, and system for energy efficiency and energy conservation including optimizing C-state selection under variable wakeup rates

Power management coordination in multi-core processors

SISTLA KRISHNAKANTH V

User level control of power management policies

WEISSMANN ELIEZER

Apparatus and method for accelerating operations in a processor which uses shared virtual memory