P

Inventor

FILSETH PAUL

US7 patents
⚠️ This page may combine multiple inventors who share the name “FILSETH PAUL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LSI LOGIC CORP

6 patents
US6768958B2Jul 27, 2004

Automatic calibration of a masking process simulator

LSI LOGIC CORP35 citations91
US6782525B2Aug 24, 2004

Wafer process critical dimension, alignment, and registration analysis simulation tool

LSI LOGIC CORP23 citations90
US5473546ADec 5, 1995

Method for flattening hierarchical design descriptions

LSI LOGIC CORP37 citations90
US7171047B2Jan 30, 2007

Adaptive Sem edge recognition algorithm

LSI LOGIC CORP11 citations82
US7149340B2Dec 12, 2006

Mask defect analysis for both horizontal and vertical processing effects

LSI LOGIC CORP12 citations82
US6868355B2Mar 15, 2005

Automatic calibration of a masking process simulator

LSI LOGIC CORP7 citations72

LSI CORP

1 patent
US7264906B2Sep 4, 2007

OPC based illumination optimization with mask error constraints

LSI CORP4 citations61