P

Inventor

ZHANG FULONG

US28 patents
⚠️ This page may combine multiple inventors who share the name “ZHANG FULONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LATTICE SEMICONDUCTOR CORP

24 patents
US6856171B1Feb 15, 2005

Synchronization of programmable multiplexers and demultiplexers

LATTICE SEMICONDUCTOR CORP39 citations96
US6952115B1Oct 4, 2005

Programmable I/O interfaces for FPGAs and other PLDs

LATTICE SEMICONDUCTOR CORP17 citations92
US7573770B1Aug 11, 2009

Distributed front-end FIFO for source-synchronized interfaces with non-continuous clocks

LATTICE SEMICONDUCTOR CORP22 citations91
US6975137B1Dec 13, 2005

Programmable logic devices with integrated standard-cell logic blocks

LATTICE SEMICONDUCTOR CORP20 citations91
US6903574B2Jun 7, 2005

Memory access via serial memory interface

LATTICE SEMICONDUCTOR CORP24 citations91
US6870395B2Mar 22, 2005

Programmable logic devices with integrated standard-cell logic blocks

LATTICE SEMICONDUCTOR CORP36 citations91
US7009433B2Mar 7, 2006

Digitally controlled delay cells

LATTICE SEMICONDUCTOR CORP35 citations90
US7863931B1Jan 4, 2011

Flexible delay cell architecture

LATTICE SEMICONDUCTOR CORP7 citations84
US7009423B1Mar 7, 2006

Programmable I/O interfaces for FPGAs and other PLDs

LATTICE SEMICONDUCTOR CORP12 citations84
US7620839B2Nov 17, 2009

Jitter tolerant delay-locked loop circuit

LATTICE SEMICONDUCTOR CORP8 citations82
US7495495B2Feb 24, 2009

Digital I/O timing control

LATTICE SEMICONDUCTOR CORP8 citations76
US7109756B1Sep 19, 2006

Synchronization of programmable multiplexers and demultiplexers

LATTICE SEMICONDUCTOR CORP6 citations74
US7091763B1Aug 15, 2006

Clock generation

LATTICE SEMICONDUCTOR CORP8 citations73
US12197581B2Jan 14, 2025

Key provisioning systems and methods for programmable logic devices

LATTICE SEMICONDUCTOR CORP1 citations72
US12189777B2Jan 7, 2025

Secure boot systems and methods for programmable logic devices

LATTICE SEMICONDUCTOR CORP1 citations72
US11132207B2Sep 28, 2021

Fast boot systems and methods for programmable logic devices

LATTICE SEMICONDUCTOR CORP2 citations66
US7109754B1Sep 19, 2006

Synchronization of programmable multiplexers and demultiplexers

LATTICE SEMICONDUCTOR CORP3 citations63
US8686773B1Apr 1, 2014

In-system margin measurement circuit

LATTICE SEMICONDUCTOR CORP1 citations61
US7808855B1Oct 5, 2010

Distributed front-end FIFO for source-synchronous interfaces with non-continuous clocks

LATTICE SEMICONDUCTOR CORP2 citations61
US11971992B2Apr 30, 2024

Failure characterization systems and methods for erasing and debugging programmable logic devices

LATTICE SEMICONDUCTOR CORP0 citations60
US11914716B2Feb 27, 2024

Asset management systems and methods for programmable logic devices

LATTICE SEMICONDUCTOR CORP0 citations60
US11847471B2Dec 19, 2023

Fast boot systems and methods for programmable logic devices

LATTICE SEMICONDUCTOR CORP1 citations58
US12093701B2Sep 17, 2024

Fast boot systems and methods for programmable logic devices

LATTICE SEMICONDUCTOR CORP0 citations55
US11681536B2Jun 20, 2023

Fast boot systems and methods for programmable logic devices

LATTICE SEMICONDUCTOR CORP0 citations55

ZHANG FULONG

4 patents