Inventor
NARANG ANGAD
US6 patents
Patents
6 patentsUS6216215B1Apr 10, 2001
Method and apparatus for senior loads
INTEL CORP95 citations97
US6202129B1Mar 13, 2001
Shared cache structure for temporal and non-temporal information using indicative bits
INTEL CORP94 citations97
US6122715ASep 19, 2000
Method and system for optimizing write combining performance in a shared buffer structure
INTEL CORP84 citations96
US6643745B1Nov 4, 2003
Method and apparatus for prefetching data into cache
INTEL CORP93 citations95
US6584547B2Jun 24, 2003
Shared cache structure for temporal and non-temporal instructions
INTEL CORP26 citations92
US6526499B2Feb 25, 2003
Method and apparatus for load buffers
INTEL CORP17 citations92