Inventor
LECHATON JOHN S
US17 patents
⚠️ This page may combine multiple inventors who share the name “LECHATON JOHN S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
15 patentsUS4960726AOct 2, 1990
BiCMOS process
IBM78 citations96
US4726879AFeb 23, 1988
RIE process for etching silicon isolation trenches and polycides with vertical surfaces
IBM79 citations94
US5086016AFeb 4, 1992
Method of making semiconductor device contact including transition metal-compound dopant source
IBM27 citations92
US4661832AApr 28, 1987
Total dielectric isolation for integrated circuits
IBM29 citations92
US4502913AMar 5, 1985
Total dielectric isolation for integrated circuits
IBM50 citations92
US4435898AMar 13, 1984
Method for making a base etched transistor integrated circuit
IBM31 citations92
US4389281AJun 21, 1983
Method of planarizing silicon dioxide in semiconductor devices
IBM32 citations92
US4131533ADec 26, 1978
RF sputtering apparatus having floating anode shield
IBM64 citations91
US4029562AJun 14, 1977
Forming feedthrough connections for multi-level interconnections metallurgy systems
IBM24 citations81
US4090006AMay 16, 1978
Structure for making coplanar layers of thin films
IBM30 citations78
US5279987AJan 18, 1994
Fabricating planar complementary patterned subcollectors with silicon epitaxial layer
IBM10 citations73
US4535531AAug 20, 1985
Method and resulting structure for selective multiple base width transistor structures
IBM19 citations73
US4752817AJun 21, 1988
High performance integrated circuit having modified extrinsic base
IBM16 citations72
US4573256AMar 4, 1986
Method for making a high performance transistor integrated circuit
IBM13 citations72
US4035276AJul 12, 1977
Making coplanar layers of thin films
IBM15 citations70