Inventor
ROSSBACH PAUL CHARLES
US6 patents
Patents
6 patentsUS5901307AMay 4, 1999
Processor having a selectively configurable branch prediction unit that can access a branch prediction utilizing bits derived from a plurality of sources
IBM57 citations93
US5715427AFeb 3, 1998
Semi-associative cache with MRU/LRU replacement
IBM39 citations87
US5974535AOct 26, 1999
Method and system in data processing system of permitting concurrent processing of instructions of a particular type
IBM19 citations85
US5765017AJun 9, 1998
Method and system in a data processing system for efficient management of an indication of a status of each of multiple registers
IBM15 citations72
US5784606AJul 21, 1998
Method and system in a superscalar data processing system for the efficient handling of exceptions
IBM8 citations71
US5765221AJun 9, 1998
Method and system of addressing which minimize memory utilized to store logical addresses by storing high order bits within a register
IBM3 citations61