P

Inventor

NADKARNI RAHUL K

US10 patents
⚠️ This page may combine multiple inventors who share the name “NADKARNI RAHUL K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

IBM

8 patents
US7924588B2Apr 12, 2011

Content addressable memory with concurrent two-dimensional search capability in both row and column directions

IBM23 citations92
US6597596B2Jul 22, 2003

Content addressable memory having cascaded sub-entry architecture

IBM16 citations90
US7515449B2Apr 7, 2009

CAM asynchronous search-line switching

IBM10 citations83
US6920525B2Jul 19, 2005

Method and apparatus of local word-line redundancy in CAM

IBM18 citations82
US6512684B2Jan 28, 2003

Content addressable memory having cascaded sub-entry architecture

IBM14 citations82
US6430072B1Aug 6, 2002

Embedded CAM test structure for fully testing all matchlines

IBM15 citations82
US7619923B2Nov 17, 2009

Apparatus for reducing leakage in global bit-line architectures

IBM4 citations62
US8873269B2Oct 28, 2014

Read only memory bitline load-balancing

IBM1 citations37

ARSOVSKI IGOR

1 patent
US8233302B2Jul 31, 2012

Content addressable memory with concurrent read and search/compare operations at the same memory cell

ARSOVSKI IGOR14 citations83

BICKFORD JEANNE P

1 patent
US9557378B2Jan 31, 2017

Method and structure for multi-core chip product test and selective voltage binning disposition

BICKFORD JEANNE P3 citations72