Inventor

CHARNEY MARK J

US168 patents

⚠️ This page may combine multiple inventors who share the name “CHARNEY MARK J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHARNEY MARK J

INTEL CORP

Systems, methods, and apparatuses for dot production operations

Systems, methods, and apparatuses for tile matrix multiplication and accumulation

Systems for performing instructions to quickly convert and use tiles as 1D vectors

Systems, methods, and apparatuses for tile diagonal

Systems and methods for performing matrix compress and decompress instructions

Systems for performing instructions for fast element unpacking into 2-dimensional registers

Systems, methods, and apparatus for matrix move

Systems, methods, and apparatuses for tile store

Systems, methods, and apparatus for tile configuration

Systems, methods, and apparatuses for tile store

Systems, methods, and apparatuses for tile load

Systems, methods, and apparatuses for zeroing a matrix

Systems, methods, and apparatuses for tile store

Systems, methods, and apparatus for matrix move

Systems, methods, and apparatuses for tile broadcast

Systems, methods, and apparatuses for matrix add, subtract, and multiply

Systems and methods to load a tile register pair

Systems, methods, and apparatus for tile configuration

Systems and methods to zero a tile register pair

Systems and methods for performing instructions specifying ternary tile logic operations

Systems and methods for performing 16-bit floating-point matrix dot product instructions

Systems and methods for performing instructions to transform matrices into row-interleaved format

Systems and methods for performing instructions to transpose rectangular tiles

Interruptible and restartable matrix multiplication instructions, processors, methods, and systems

Systems, apparatuses, and methods for chained fused multiply add

Apparatuses, methods, and systems for 8-bit floating-point matrix dot product instructions

Matrix transpose and multiply

Systems for performing instructions to quickly convert and use tiles as 1D vectors

Apparatuses, methods, and systems for instructions for 16-bit floating-point matrix dot product instructions

Systems and methods for performing 16-bit floating-point matrix dot product instructions

Systems and methods for performing nibble-sized operations on matrix elements

Systems and methods of instructions to accelerate multiplication of sparse matrices using bitmasks that identify non-zero elements

Systems, methods, and apparatuses for matrix operations

Systems and methods to store a tile register pair to memory

Systems and methods for computing dot products of nibbles in two tile operands

Systems and methods for performing matrix compress and decompress instructions

Systems for performing instructions to quickly convert and use tiles as 1D vectors

Systems, methods, and apparatuses for dot product operations

Systems and methods for performing 16-bit floating-point matrix dot product instructions

Systems and methods to load a tile register pair

Systems for performing instructions to quickly convert and use tiles as 1D vectors

Systems and methods for performing horizontal tile operations

Systems for performing instructions for fast element unpacking into 2-dimensional registers

Systems and methods for performing instructions to transpose rectangular tiles

Systems and methods for performing instructions to convert to 16-bit floating-point format

Systems and methods for performing matrix compress and decompress instructions

Systems, methods, and apparatuses for heterogeneous computing

Systems and methods to zero a tile register pair

IBM

Method and apparatus for reducing latency in set-associative caches using set prediction

HUGHES CHRISTOPHER J

Gathering and scattering multiple data elements